GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brya/var/{redrix, redrix4es}: Use ACPI _PLD macro 

This patch uses ACPI _PLD macros for USB Type A and C ports.

BUG=b:216490477
TEST=emerge-brya coreboot

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I61f8f39ce7651d499756f4975840f32f89b04ca7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Subrata Banik 2022-02-16 18:44:09 +05:30 committed by Felix Held
parent 41994fee94
commit ef47212bf8
2 changed files with 12 additions and 72 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
src/mainboard/google/brya/variants/redrix/overridetree.cb
View File

@ -474,24 +474,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_LEFT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_OVAL,
.group = ACPI_PLD_GROUP(1, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_RIGHT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_OVAL,
.group = ACPI_PLD_GROUP(2, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@ -504,24 +494,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_LEFT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_OVAL,
.group = ACPI_PLD_GROUP(1, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_RIGHT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_OVAL,
.group = ACPI_PLD_GROUP(2, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@ -538,12 +518,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_RIGHT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
.group = ACPI_PLD_GROUP(3, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@ -557,12 +532,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_RIGHT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
.group = ACPI_PLD_GROUP(3, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi

42
src/mainboard/google/brya/variants/redrix4es/overridetree.cb
View File

@ -460,24 +460,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_LEFT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_OVAL,
.group = ACPI_PLD_GROUP(1, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_RIGHT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_OVAL,
.group = ACPI_PLD_GROUP(2, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@ -490,24 +480,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_LEFT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_OVAL,
.group = ACPI_PLD_GROUP(1, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_RIGHT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_OVAL,
.group = ACPI_PLD_GROUP(2, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@ -524,12 +504,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_RIGHT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
.group = ACPI_PLD_GROUP(3, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@ -543,12 +518,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
register "custom_pld" = "{
.visible = true,
.panel = PLD_PANEL_RIGHT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
.group = ACPI_PLD_GROUP(3, 1)}"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi