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mb/google/cherry: Get RAM code from ADC 

On Chromebooks the RAM code is implemented by the resistor straps
that we can read and decode from ADC. For Cherry the RAM code can be
read from ADC channel 2 and 3.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I4f28bc1c567cb886bd90d930219981a6206b9bb9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55156
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Rex-BC Chen 2021-05-31 21:44:05 +08:00 committed by Hung-Te Lin
parent d2644dbf5f
commit ef53634d9a
1 changed files with 59 additions and 1 deletions
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60
src/mainboard/google/cherry/boardid.c
View File

@ -1,8 +1,66 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <assert.h>
#include <boardid.h>
#include <console/console.h>
#include <soc/auxadc.h>
#define ADC_LEVELS 12
enum {
/* RAM IDs */
RAM_ID_HIGH_CHANNEL = 3,
RAM_ID_LOW_CHANNEL = 2,
};
static const unsigned int ram_voltages[ADC_LEVELS] = {
/* ID : Voltage (unit: uV) */
[0] = 74300,
[1] = 211700,
[2] = 318800,
[3] = 428600,
[4] = 541700,
[5] = 665800,
[6] = 781400,
[7] = 900000,
[8] = 1023100,
[9] = 1137000,
[10] = 1240000,
[11] = 1342600,
};
static const unsigned int *adc_voltages[] = {
[RAM_ID_HIGH_CHANNEL] = ram_voltages,
[RAM_ID_LOW_CHANNEL] = ram_voltages,
};
static uint32_t get_adc_index(unsigned int channel)
{
unsigned int value = auxadc_get_voltage_uv(channel);
assert(channel < ARRAY_SIZE(adc_voltages));
const unsigned int *voltages = adc_voltages[channel];
assert(voltages);
/* Find the closest voltage */
uint32_t id;
for (id = 0; id < ADC_LEVELS - 1; id++)
if (value < (voltages[id] + voltages[id + 1]) / 2)
break;
printk(BIOS_DEBUG, "ADC[%u]: Raw value=%u ID=%u\n", channel, value, id);
return id;
}
uint32_t ram_code(void)
{
return 0;
static uint32_t cached_ram_code = BOARD_ID_INIT;
if (cached_ram_code == BOARD_ID_INIT) {
cached_ram_code = (get_adc_index(RAM_ID_HIGH_CHANNEL) << 4 |
get_adc_index(RAM_ID_LOW_CHANNEL));
printk(BIOS_DEBUG, "RAM Code: %#02x\n", cached_ram_code);
}
return cached_ram_code;
}