northbridge/amdfam10: Deal with PCI_ADDR() better

PCI_ADDR() is tightly coupled with different setup_resource_map()
variants so move the declaration away from global namespace.

In the implementation of setup_resource_map() use the bottom
12 bits as the register mask like the other variants do already.

Change-Id: Iadedfe993621a4458ce8f12c5e98c8cee537d2db
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30784
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2019-01-03 11:39:15 +02:00
parent 20c294884f
commit ef62994b94
3 changed files with 10 additions and 10 deletions

View File

@ -235,12 +235,6 @@ static inline int __ffs(u32 value)
#ifdef __SIMPLE_DEVICE__
#define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \
(((SEGBUS) & 0xFFF) << 20) | \
(((DEV) & 0x1F) << 15) | \
(((FN) & 0x07) << 12) | \
((WHERE) & 0xFFF))
#define PCI_DEV(SEGBUS, DEV, FN) ( \
(((SEGBUS) & 0xFFF) << 20) | \
(((DEV) & 0x1F) << 15) | \

View File

@ -29,6 +29,12 @@ struct MCTStatStruc;
/* Definitions for setup_resourcemap() variants. */
#define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \
(((SEGBUS) & 0xFFF) << 20) | \
(((DEV) & 0x1F) << 15) | \
(((FN) & 0x07) << 12) | \
((WHERE) & 0xFFF))
#define ADDRMAP_REG(r) PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, r)
#define RES_PCI_IO 0x10

View File

@ -30,8 +30,8 @@ void setup_resource_map(const u32 *register_values, u32 max)
u32 where;
u32 reg;
dev = register_values[i] & ~0xff;
where = register_values[i] & 0xff;
dev = register_values[i] & ~0xfff;
where = register_values[i] & 0xfff;
reg = pci_read_config32(dev, where);
reg &= register_values[i+1];
reg |= register_values[i+2];
@ -144,8 +144,8 @@ void setup_resource_map_x(const u32 *register_values, u32 max)
pci_devfn_t dev;
u32 where;
u32 reg;
dev = register_values[i+1] & ~0xff;
where = register_values[i+1] & 0xff;
dev = register_values[i+1] & ~0xfff;
where = register_values[i+1] & 0xfff;
reg = pci_read_config32(dev, where);
reg &= register_values[i+2];
reg |= register_values[i+3];