Add directive __SIMPLE_DEVICE__

The tests for __PRE_RAM__ or __SMM__ were repeatedly used
for detection if dev->ops in the devicetree are not available
and simple device model functions need be used.

If a source file build for ramstage had __PRE_RAM__ inserted
at the beginning, the struct device would no longer match the
allocation the object had taken. This problem is fixed by
replacing such cases with explicit __SIMPLE_DEVICE__.

Change-Id: Ib74c9b2d8753e6e37e1a23fcfaa2f3657790d4c0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3555
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

src/arch/armv7/include/arch/rules.h

@@ -0,0 +1,34 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _ARCH_RULES_H
+#define _ARCH_RULES_H
+
+/* For romstage and ramstage always build with simple device model, ie.
+ * PCI, PNP and CPU functions operate without use of devicetree.
+ *
+ * For ramstage individual source file may define __SIMPLE_DEVICE__
+ * before including any header files to force that particular source
+ * be built with simple device model.
+ */
+
+#if defined(__PRE_RAM__)
+#define __SIMPLE_DEVICE__
+#endif
+
+#endif /* _ARCH_RULES_H */

src/arch/x86/include/arch/cpu.h

@@ -2,6 +2,7 @@
 #define ARCH_CPU_H
 
 #include <stdint.h>
+#include <arch/rules.h>
 
 /*
  * EFLAGS bits
@@ -141,12 +142,13 @@ static inline unsigned int cpuid_edx(unsigned int op)
 #define X86_VENDOR_ANY     0xfe
 #define X86_VENDOR_UNKNOWN 0xff
 
-#if !defined(__PRE_RAM__) && !defined(__SMM__)
-#include <device/device.h>
-
 int cpu_phys_address_size(void);
 int cpu_have_cpuid(void);
 
+#ifndef __SIMPLE_DEVICE__
+
+struct device;
+
 struct cpu_device_id {
 	unsigned vendor;
 	unsigned device;
@@ -163,7 +165,7 @@ struct cpu_driver *find_cpu_driver(struct device *cpu);
 struct thread;
 
 struct cpu_info {
-	device_t cpu;
+	struct device *cpu;
 	unsigned int index;
 #if CONFIG_COOP_MULTITASKING
 	struct thread *thread;
@@ -188,8 +190,6 @@ static inline unsigned long cpu_index(void)
 	ci = cpu_info();
 	return ci->index;
 }
-#else
-#include <arch/io.h>
 #endif
 
 #ifndef __ROMCC__ // romcc is segfaulting in some cases

src/arch/x86/include/arch/io.h

@@ -2,6 +2,7 @@
 #define _ASM_IO_H
 
 #include <stdint.h>
+#include <arch/rules.h>
 
 /*
  * This file contains the definitions for the x86 IO instructions
@@ -188,6 +189,9 @@ static inline int log2f(int value)
         return r;
 
 }
+#endif
+
+#ifdef __SIMPLE_DEVICE__
 
 #define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \
         (((SEGBUS) & 0xFFF) << 20) | \
@@ -325,7 +329,7 @@ static inline __attribute__((always_inline)) void pnp_set_drq(device_t dev, unsi
 	pnp_write_config(dev, index, drq & 0xff);
 }
 
-#endif /* __PRE_RAM__ */
+#endif /* __SIMPLE_DEVICE__ */
 
 #endif
 

src/arch/x86/include/arch/pci_ops.h

@@ -1,6 +1,8 @@
 #ifndef ARCH_I386_PCI_OPS_H
 #define ARCH_I386_PCI_OPS_H
 
+#ifndef __SIMPLE_DEVICE__
+
 extern const struct pci_bus_operations pci_cf8_conf1;
 
 #if CONFIG_MMCONF_SUPPORT
@@ -9,4 +11,6 @@ extern const struct pci_bus_operations pci_ops_mmconf;
 
 const struct pci_bus_operations *pci_bus_default_ops(device_t dev);
 
+#endif
+
 #endif /* ARCH_I386_PCI_OPS_H */

src/arch/x86/include/arch/rules.h

@@ -0,0 +1,34 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _ARCH_RULES_H
+#define _ARCH_RULES_H
+
+/* For romstage and ramstage always build with simple device model, ie.
+ * PCI, PNP and CPU functions operate without use of devicetree.
+ *
+ * For ramstage individual source file may define __SIMPLE_DEVICE__
+ * before including any header files to force that particular source
+ * be built with simple device model.
+ */
+
+#if defined(__PRE_RAM__) || defined(__SMM__)
+#define __SIMPLE_DEVICE__
+#endif
+
+#endif /* _ARCH_RULES_H */

src/include/device/device.h

@@ -1,14 +1,15 @@
 #ifndef DEVICE_H
 #define DEVICE_H
 
-#ifndef __SMM__
 #include <stdint.h>
 #include <stddef.h>
+#include <arch/rules.h>
 #include <device/resource.h>
 #include <device/path.h>
 
 struct device;
-#ifndef __PRE_RAM__
+
+#ifndef __SIMPLE_DEVICE__
 typedef struct device * device_t;
 struct pci_operations;
 struct pci_bus_operations;
@@ -45,7 +46,7 @@ struct device_operations {
 	const struct pci_bus_operations * (*ops_pci_bus)(device_t dev);
 	const struct pnp_mode_ops *ops_pnp_mode;
 };
-#endif
+#endif /* ! __SIMPLE_DEVICE__ */
 
 
 struct bus {
@@ -116,9 +117,10 @@ struct device {
  * static.c file and is generated by the config tool at compile time.
  */
 extern ROMSTAGE_CONST struct device	dev_root;
-#ifndef __PRE_RAM__
-extern struct device	*all_devices;	/* list of all devices */
 
+#ifndef __SIMPLE_DEVICE__
+
+extern struct device	*all_devices;	/* list of all devices */
 extern struct resource	*free_resources;
 extern struct bus	*free_links;
 
@@ -222,13 +224,14 @@ void fixed_mem_resource(device_t dev, unsigned long index,
 
 void tolm_test(void *gp, struct device *dev, struct resource *new);
 u32 find_pci_tolm(struct bus *bus);
-#else
+
+#else /* vv __SIMPLE_DEVICE__ vv */
+
 ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus,
 						unsigned int devfn);
 ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus,
 							unsigned int addr);
+
 #endif
-#else /* __SMM__ */
+
-#include <arch/io.h>
-#endif /* __SMM__ */
 #endif /* DEVICE_H */

src/include/device/pci.h

@@ -17,13 +17,15 @@
 
 #include <stdint.h>
 #include <stddef.h>
+#include <arch/rules.h>
 #include <device/pci_def.h>
 #include <device/resource.h>
 #include <device/device.h>
-#if !defined(__PRE_RAM__) && !defined(__SMM__)
 #include <device/pci_ops.h>
 #include <device/pci_rom.h>
 
+#ifndef __SIMPLE_DEVICE__
+
 /* Common pci operations without a standard interface */
 struct pci_operations {
 	/* set the Subsystem IDs for the PCI device */
@@ -94,5 +96,5 @@ static inline const struct pci_operations *ops_pci(device_t dev)
 	return pops;
 }
 
-#endif
+#endif /* ! __SIMPLE_DEVICE__ */
 #endif /* PCI_H */

src/include/device/pci_ops.h

@@ -1,11 +1,11 @@
 #ifndef PCI_OPS_H
 #define PCI_OPS_H
 
-#ifndef __SMM__
 #include <stdint.h>
 #include <device/device.h>
 #include <arch/pci_ops.h>
 
+#ifndef __SIMPLE_DEVICE__
 u8 pci_read_config8(device_t dev, unsigned int where);
 u16 pci_read_config16(device_t dev, unsigned int where);
 u32 pci_read_config32(device_t dev, unsigned int where);

src/include/device/pnp.h

@@ -2,10 +2,12 @@
 #define DEVICE_PNP_H
 
 #include <stdint.h>
+#include <arch/rules.h>
 #include <device/device.h>
 #include <device/pnp_def.h>
 
-#if !defined(__PRE_RAM__) && !defined(__SMM__)
+#ifndef __SIMPLE_DEVICE__
+
 /* Primitive PNP resource manipulation */
 void pnp_write_config(device_t dev, u8 reg, u8 value);
 u8 pnp_read_config(device_t dev, u8 reg);
@@ -59,5 +61,5 @@ struct pnp_mode_ops {
 void pnp_enter_conf_mode(device_t dev);
 void pnp_exit_conf_mode(device_t dev);
 
-#endif
+#endif /* ! __SIMPLE_DEVICE__ */
 #endif /* DEVICE_PNP_H */

src/lib/uart8250mem.c

@@ -24,9 +24,7 @@
 #if CONFIG_USE_OPTION_TABLE
 #include "option_table.h"
 #endif
-#if !defined(__SMM__) && !defined(__PRE_RAM__)
 #include <device/device.h>
-#endif
 #include <delay.h>
 
 /* Should support 8250, 16450, 16550, 16550A type UARTs */
@@ -129,7 +127,7 @@ u32 uart_mem_init(void)
 	/* Now find the UART base address and calculate the divisor */
 #if CONFIG_DRIVERS_OXFORD_OXPCIE
 
-#if defined(MORE_TESTING) && !defined(__SMM__) && !defined(__PRE_RAM__)
+#if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__)
 	device_t dev = dev_find_device(0x1415, 0xc158, NULL);
 	if (!dev)
 		dev = dev_find_device(0x1415, 0xc11b, NULL);

src/northbridge/intel/gm45/ram_calc.c

@@ -19,9 +19,9 @@
  * MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <stdint.h>
 #include <arch/io.h>
 #include <device/pci_def.h>

src/northbridge/intel/sch/port_access.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <stdint.h>
 #include <arch/io.h>
 #include <device/pci_def.h>

src/southbridge/amd/agesa/hudson/reset.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <arch/io.h>
 #include <reset.h>
 

src/southbridge/amd/cimx/sb700/reset.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <arch/io.h>
 #include <reset.h>
 

src/southbridge/amd/cimx/sb800/reset.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <arch/io.h>
 #include <reset.h>
 

src/southbridge/amd/cimx/sb900/early.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <stdint.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>

src/southbridge/amd/cimx/sb900/reset.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <arch/io.h>
 #include <reset.h>
 

src/southbridge/amd/sb600/reset.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <arch/io.h>
 #include <reset.h>
 

src/southbridge/amd/sb700/reset.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <arch/io.h>
 #include <reset.h>
 

src/southbridge/amd/sb800/reset.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <arch/io.h>
 #include <reset.h>
 

src/southbridge/intel/common/usb_debug.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __PRE_RAM__
+// Use simple device model for this file even in ramstage
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#define __SIMPLE_DEVICE__
-#endif
+
 #include <stdint.h>
 #include <arch/io.h>
 #include <console/console.h>