mb/google/nissa/var/xivu: Generate RAM ID and SPD file
Add the support RAM parts for Xivu. Here is the ram part number list: DRAM Part Name ID to assign MT62F1G32D4DR-031 WT:B 0 (0000) MT62F512M32D2DR-031 WT:B 1 (0001) H9JCNNNBK3MLYR-N6E 1 (0001) K3LKBKB0BM-MGCP 2 (0010) BUG=b:236576117 BRANCH=None TEST=Use part_id_gen to generate related settings and emerge-nissa coreboot Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: I02866f7dcdc70d1051d187fdda30e04bb654ece3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65252 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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# SPDX-License-Identifier: GPL-2.0-or-later
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# This is an auto-generated file. Do not edit!!
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# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
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# Generated by:
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# /tmp/go-build2397504908/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
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SPD_SOURCES = placeholder
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SPD_SOURCES =
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SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B
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SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E
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SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 2(0b0010) Parts = K3LKBKB0BM-MGCP
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# SPDX-License-Identifier: GPL-2.0-or-later
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# This is an auto-generated file. Do not edit!!
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# Generated by:
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# /tmp/go-build2397504908/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
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DRAM Part Name ID to assign
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MT62F1G32D4DR-031 WT:B 0 (0000)
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MT62F512M32D2DR-031 WT:B 1 (0001)
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H9JCNNNBK3MLYR-N6E 1 (0001)
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K3LKBKB0BM-MGCP 2 (0010)
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# See util/spd_tools/README.md for more details and instructions.
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# Part Name
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MT62F1G32D4DR-031 WT:B
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MT62F512M32D2DR-031 WT:B
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H9JCNNNBK3MLYR-N6E
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K3LKBKB0BM-MGCP
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