src/acpi: Add APEI EINJ support
This adds full EINJ support with trigger action tables. The actual error injection functionality is HW specific. Therefore, HW specific code should call acpi_create_einj with an address where action table resides. The default params of the action table are filled out by the common code. Control is then returned back to the caller to modify or override default parameters. If no changes are needed, caller can simply add the acpi table. At runtime, FW is responsible for filling out the action table with the proper entries. The action table memory is shared between FW and OS. This memory should be marked as reserved in E820 table. Tested on Deltalake mainboard. Boot to OS, load the EINJ driver ( modprobe EINJ) and verify EINJ memory entries are in /proc/iomem. Further tested by injecting errors via the APEI file nodes. More information on error injection can be referenced in the latest ACPI spec. Change-Id: I29c6a861c564ec104f2c097f3e49b3e6d38b040e Signed-off-by: Rocky Phagura <rphagura@fb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49286 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Rocky Phagura
This commit is contained in:
Rocky Phagura
David Hendricks
parent
7da1c1732a
commit
eff0713dfc
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@ -38,6 +38,12 @@ config ACPI_NO_PCAT_8259
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help
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Selected by platforms that don't expose a PC/AT 8259 PIC pair.
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config ACPI_EINJ
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def_bool n
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depends on HAVE_ACPI_TABLES
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help
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This variable provides control for ACPI error injection table (EINJ)
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config HAVE_ACPI_TABLES
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bool
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help
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148
src/acpi/acpi.c
148
src/acpi/acpi.c
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@ -785,6 +785,152 @@ void acpi_create_hpet(acpi_hpet_t *hpet)
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header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
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}
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/*
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* This method adds the ACPI error injection capability. It fills the default information.
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* HW dependent code (caller) can modify the defaults upon return. If no changes are necessary
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* and the defaults are acceptable then caller can simply add the table (acpi_add_table).
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* INPUTS:
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* einj - ptr to the starting location of EINJ table
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* actions - number of actions to trigger an error (HW dependent)
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* addr - address of trigger action table. This should be ACPI reserved memory and it will be
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* shared between OS and FW.
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*/
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void acpi_create_einj(acpi_einj_t *einj, uintptr_t addr, u8 actions)
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{
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int i;
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acpi_header_t *header = &(einj->header);
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acpi_injection_header_t *inj_header = &(einj->inj_header);
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acpi_einj_smi_t *einj_smi = (acpi_einj_smi_t *)addr;
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acpi_einj_trigger_table_t *tat;
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if (!header)
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return;
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printk(BIOS_DEBUG, "%s einj_smi = %p\n", __func__, einj_smi);
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memset(einj_smi, 0, sizeof(acpi_einj_smi_t));
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tat = (acpi_einj_trigger_table_t *)(einj_smi + sizeof(acpi_einj_smi_t));
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tat->header_size = 16;
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tat->revision = 0;
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tat->table_size = sizeof(acpi_einj_trigger_table_t) +
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sizeof(acpi_einj_action_table_t) * actions - 1;
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tat->entry_count = actions;
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printk(BIOS_DEBUG, "%s trigger_action_table = %p\n", __func__, tat);
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for (i = 0; i < actions; i++) {
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tat->trigger_action[i].action = TRIGGER_ERROR;
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tat->trigger_action[i].instruction = NO_OP;
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tat->trigger_action[i].flags = FLAG_IGNORE;
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tat->trigger_action[i].reg.space_id = ACPI_ADDRESS_SPACE_MEMORY;
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tat->trigger_action[i].reg.bit_width = 64;
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tat->trigger_action[i].reg.bit_offset = 0;
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tat->trigger_action[i].reg.access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS;
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tat->trigger_action[i].reg.addr = 0;
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tat->trigger_action[i].value = 0;
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tat->trigger_action[i].mask = 0xFFFFFFFF;
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}
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acpi_einj_action_table_t default_actions[ACTION_COUNT] = {
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[0] = {
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.action = BEGIN_INJECT_OP,
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.instruction = WRITE_REGISTER_VALUE,
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.flags = FLAG_PRESERVE,
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.reg = EINJ_REG_MEMORY((u64)(uintptr_t)&einj_smi->op_state),
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.value = 0,
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.mask = 0xFFFFFFFF
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},
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[1] = {
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.action = GET_TRIGGER_ACTION_TABLE,
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.instruction = READ_REGISTER,
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.flags = FLAG_IGNORE,
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.reg = EINJ_REG_MEMORY((u64)(uintptr_t)&einj_smi->trigger_action_table),
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.value = 0,
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.mask = 0xFFFFFFFFFFFFFFFF
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},
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[2] = {
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.action = SET_ERROR_TYPE,
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.instruction = WRITE_REGISTER,
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.flags = FLAG_PRESERVE,
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.reg = EINJ_REG_MEMORY((u64)(uintptr_t)&einj_smi->err_inject[0]),
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.value = 0,
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.mask = 0xFFFFFFFF
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},
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[3] = {
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.action = GET_ERROR_TYPE,
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.instruction = READ_REGISTER,
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.flags = FLAG_IGNORE,
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.reg = EINJ_REG_MEMORY((u64)(uintptr_t)&einj_smi->err_inj_cap),
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.value = 0,
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.mask = 0xFFFFFFFF
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},
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[4] = {
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.action = END_INJECT_OP,
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.instruction = WRITE_REGISTER_VALUE,
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.flags = FLAG_PRESERVE,
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.reg = EINJ_REG_MEMORY((u64)(uintptr_t)&einj_smi->op_state),
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.value = 0,
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.mask = 0xFFFFFFFF
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},
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[5] = {
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.action = EXECUTE_INJECT_OP,
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.instruction = WRITE_REGISTER_VALUE,
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.flags = FLAG_PRESERVE,
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.reg = EINJ_REG_IO(),
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.value = 0x9a,
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.mask = 0xFFFF,
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},
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[6] = {
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.action = CHECK_BUSY_STATUS,
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.instruction = READ_REGISTER_VALUE,
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.flags = FLAG_IGNORE,
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.reg = EINJ_REG_MEMORY((u64)(uintptr_t)&einj_smi->op_status),
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.value = 1,
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.mask = 1,
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},
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[7] = {
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.action = GET_CMD_STATUS,
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.instruction = READ_REGISTER,
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.flags = FLAG_PRESERVE,
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.reg = EINJ_REG_MEMORY((u64)(uintptr_t)&einj_smi->cmd_sts),
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.value = 0,
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.mask = 0x1fe,
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},
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[8] = {
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.action = SET_ERROR_TYPE_WITH_ADDRESS,
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.instruction = WRITE_REGISTER,
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.flags = FLAG_PRESERVE,
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.reg = EINJ_REG_MEMORY((u64)(uintptr_t)&einj_smi->setaddrtable),
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.value = 1,
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.mask = 0xffffffff
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}
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};
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einj_smi->err_inj_cap = ACPI_EINJ_DEFAULT_CAP;
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einj_smi->trigger_action_table = (u64) (uintptr_t)tat;
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for (i = 0; i < ACTION_COUNT; i++)
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printk(BIOS_DEBUG, "default_actions[%d].reg.addr is %llx\n", i,
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default_actions[i].reg.addr);
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memset((void *)einj, 0, sizeof(einj));
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/* Fill out header fields. */
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memcpy(header->signature, "EINJ", 4);
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
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memcpy(header->asl_compiler_id, ASLC, 4);
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header->asl_compiler_revision = asl_revision;
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header->length = sizeof(acpi_einj_t);
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header->revision = 1;
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inj_header->einj_header_size = sizeof(acpi_injection_header_t);
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inj_header->entry_count = ACTION_COUNT;
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printk(BIOS_DEBUG, "%s einj->action_table = %p\n",
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__func__, einj->action_table);
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memcpy((void *)einj->action_table, (void *)default_actions, sizeof(einj->action_table));
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header->checksum = acpi_checksum((void *)einj, sizeof(einj));
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}
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void acpi_create_vfct(const struct device *device,
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acpi_vfct_t *vfct,
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unsigned long (*acpi_fill_vfct)(const struct device *device,
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@ -1756,6 +1902,8 @@ int get_acpi_table_revision(enum acpi_tables table)
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return 1;
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case RSDP: /* ACPI 2.0 upto 6.3: 2 */
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return 2;
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case EINJ:
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return 1;
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case HEST:
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return 1;
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case NHLT:
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@ -71,7 +71,7 @@ enum coreboot_acpi_ids {
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enum acpi_tables {
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/* Tables defined by ACPI and used by coreboot */
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BERT, DBG2, DMAR, DSDT, FACS, FADT, HEST, HPET, IVRS, MADT, MCFG,
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BERT, DBG2, DMAR, DSDT, EINJ, FACS, FADT, HEST, HPET, IVRS, MADT, MCFG,
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RSDP, RSDT, SLIT, SRAT, SSDT, TCPA, TPM2, XSDT, ECDT, LPIT,
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/* Additional proprietary tables used by coreboot */
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VFCT, NHLT, SPMI, CRAT
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@ -980,6 +980,134 @@ struct acpi_spmi {
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u8 reserved3;
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} __packed;
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/* EINJ APEI Standard Definitions */
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/* EINJ Error Types
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Refer to the ACPI spec, EINJ section, for more info on bit definitions
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*/
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#define ACPI_EINJ_CPU_CE (1 << 0)
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#define ACPI_EINJ_CPU_UCE (1 << 1)
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#define ACPI_EINJ_CPU_UCE_FATAL (1 << 2)
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#define ACPI_EINJ_MEM_CE (1 << 3)
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#define ACPI_EINJ_MEM_UCE (1 << 4)
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#define ACPI_EINJ_MEM_UCE_FATAL (1 << 5)
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#define ACPI_EINJ_PCIE_CE (1 << 6)
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#define ACPI_EINJ_PCIE_UCE_NON_FATAL (1 << 7)
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#define ACPI_EINJ_PCIE_UCE_FATAL (1 << 8)
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#define ACPI_EINJ_PLATFORM_CE (1 << 9)
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#define ACPI_EINJ_PLATFORM_UCE (1 << 10)
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#define ACPI_EINJ_PLATFORM_UCE_FATAL (1 << 11)
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#define ACPI_EINJ_VENDOR_DEFINED (1 << 31)
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#define ACPI_EINJ_DEFAULT_CAP (ACPI_EINJ_MEM_CE | ACPI_EINJ_MEM_UCE | \
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ACPI_EINJ_PCIE_CE | ACPI_EINJ_PCIE_UCE_FATAL)
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/* EINJ actions */
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#define ACTION_COUNT 9
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#define BEGIN_INJECT_OP 0x00
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#define GET_TRIGGER_ACTION_TABLE 0x01
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#define SET_ERROR_TYPE 0x02
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#define GET_ERROR_TYPE 0x03
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#define END_INJECT_OP 0x04
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#define EXECUTE_INJECT_OP 0x05
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#define CHECK_BUSY_STATUS 0x06
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#define GET_CMD_STATUS 0x07
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#define SET_ERROR_TYPE_WITH_ADDRESS 0x08
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#define TRIGGER_ERROR 0xFF
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/* EINJ Instructions */
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#define READ_REGISTER 0x00
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#define READ_REGISTER_VALUE 0x01
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#define WRITE_REGISTER 0x02
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#define WRITE_REGISTER_VALUE 0x03
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#define NO_OP 0x04
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/* EINJ (Error Injection Table) */
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typedef struct acpi_gen_regaddr1 {
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u8 space_id; /* Address space ID */
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u8 bit_width; /* Register size in bits */
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u8 bit_offset; /* Register bit offset */
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u8 access_size; /* Access size since ACPI 2.0c */
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u64 addr; /* Register address */
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} __packed acpi_addr64_t;
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/* Instruction entry */
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typedef struct acpi_einj_action_table {
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u8 action;
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u8 instruction;
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u16 flags;
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acpi_addr64_t reg;
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u64 value;
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u64 mask;
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} __packed acpi_einj_action_table_t;
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typedef struct acpi_injection_header {
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u32 einj_header_size;
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u32 flags;
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u32 entry_count;
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} __packed acpi_injection_header_t;
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typedef struct acpi_einj_trigger_table {
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u32 header_size;
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u32 revision;
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u32 table_size;
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u32 entry_count;
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acpi_einj_action_table_t trigger_action[1];
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} __packed acpi_einj_trigger_table_t;
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typedef struct set_error_type {
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u32 errtype;
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u32 vendorerrortype;
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u32 flags;
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u32 apicid;
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u64 memaddr;
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u64 memrange;
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u32 pciesbdf;
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} __packed set_error_type_t;
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#define EINJ_PARAM_NUM 6
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typedef struct acpi_einj_smi {
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u64 op_state;
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u64 err_inject[EINJ_PARAM_NUM];
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u64 trigger_action_table;
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u64 err_inj_cap;
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u64 op_status;
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u64 cmd_sts;
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u64 einj_addr;
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u64 einj_addr_msk;
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set_error_type_t setaddrtable;
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u64 reserved[50];
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} __packed acpi_einj_smi_t;
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/* EINJ Flags */
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#define EINJ_DEF_TRIGGER_PORT 0xb2
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#define FLAG_PRESERVE 0x01
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#define FLAG_IGNORE 0x00
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/* EINJ Registers */
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#define EINJ_REG_MEMORY(address) \
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{ \
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.space_id = ACPI_ADDRESS_SPACE_MEMORY, \
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.bit_width = 64, \
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.bit_offset = 0, \
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.access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS, \
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.addr = address}
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#define EINJ_REG_IO() \
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{ \
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.space_id = ACPI_ADDRESS_SPACE_IO, \
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.bit_width = 0x10, \
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.bit_offset = 0, \
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.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS, \
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.addr = EINJ_DEF_TRIGGER_PORT} /* HW dependent code can override this also */
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typedef struct acpi_einj {
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acpi_header_t header;
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acpi_injection_header_t inj_header;
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acpi_einj_action_table_t action_table[ACTION_COUNT];
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} __packed acpi_einj_t;
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void acpi_create_einj(acpi_einj_t *einj, uintptr_t addr, u8 actions);
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unsigned long fw_cfg_acpi_tables(unsigned long start);
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/* These are implemented by the target port or north/southbridge. */
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