GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brya/var/felwinter: Disable PCIE port 6 

PCIE port 6 is empty as per schematics.

BUG=b:206047996
TEST=PCIE port 6 is disabled.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I30fa897c9310c44545e3df670895639a5144e1de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59243
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Eric Lai 2021-11-12 15:45:27 +08:00 committed by Werner Zeh
parent fb02f0a55e
commit f005c34172
1 changed files with 1 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/google/brya/variants/felwinter/overridetree.cb
View File

@ -60,6 +60,7 @@ chip soc/intel/alderlake
end end
end end
end end
device ref pcie_rp6 off end
device ref pcie_rp8 on device ref pcie_rp8 on
chip soc/intel/common/block/pcie/rtd3 chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"