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google/glados: Set the type-c flex port to max USB2 settings 

Change the tuning setting for the type-c port that is over
the flex cable to use the max possible drive strength.

Also fix up the comments to indicate what Type-c port goes
where instead of just referring to them by number.

BUG=chrome-os-partner:45367
BRANCH=none
TEST=build and boot on glados

Change-Id: Iebcffc9ab95d56289258017248c273090c88bb06
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 824ca87c4bf556d493dc8cdec561f37ab135cd2d
Original-Change-Id: I081623bbb1b0f39f1569b9f5cf7933abefe202b3
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/309010
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12204
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Duncan Laurie 2015-10-26 15:28:59 -07:00 committed by Patrick Georgi
parent 823259332c
commit f012f1276e
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/google/glados/devicetree.cb
View File

@ -53,15 +53,15 @@ chip soc/intel/skylake
register "PcieRpClkReqNumber[0]" = "1" register "PcieRpClkReqNumber[0]" = "1"
register "PcieRpClkReqNumber[4]" = "2" register "PcieRpClkReqNumber[4]" = "2"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C" # Type-C Port 1 register "usb2_ports[0]" = "USB2_PORT_TYPE_C" # Type-C Port (board)
register "usb2_ports[1]" = "USB2_PORT_TYPE_C" # Type-C Port 2 register "usb2_ports[1]" = "USB2_PORT_MAX" # Type-C Port (flex)
register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth
register "usb2_ports[4]" = "USB2_PORT_MID" # Type-A Port 1 register "usb2_ports[4]" = "USB2_PORT_MID" # Type-A Port 1
register "usb2_ports[6]" = "USB2_PORT_FLEX" # Camera register "usb2_ports[6]" = "USB2_PORT_FLEX" # Camera
register "usb2_ports[8]" = "USB2_PORT_MID" # Type-A Port 2 register "usb2_ports[8]" = "USB2_PORT_MID" # Type-A Port 2
register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port 1 register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port (board)
register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2 register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port (flex)
register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port 1 register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port 1
register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port 2 register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port 2