GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brya/var/skolas4es: Correct _PLD values 

This patch is to denote the correct value of ACPI _PLD for USB ports.

       +----------------+
       |                |
       |     Screen     |
       |                |
       +----------------+
    C2 |                | A0
    C0 | MLB         DB | C1
       |                |
       +----------------+

BUG=b:216490477
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot

Change-Id: I96202b9ac9586975e960d6577d279c995c67f34e
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66031
Reviewed-by: Won Chung <wonchung@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Nick Vaccaro 2022-07-20 15:25:21 -07:00 committed by Martin Roth
parent 907c85ad48
commit f0198b65dc
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/google/brya/variants/skolas4es/overridetree.cb
View File

@ -742,7 +742,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true" register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end device ref tcss_usb3_port1 on end
end end
chip drivers/usb/acpi chip drivers/usb/acpi
@ -756,7 +756,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true" register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref tcss_usb3_port3 on end device ref tcss_usb3_port3 on end
end end
end end
@ -769,7 +769,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true" register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end device ref usb2_port1 on end
end end
chip drivers/usb/acpi chip drivers/usb/acpi
@ -783,7 +783,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C2 (MLB)"" register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true" register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port3 on end device ref usb2_port3 on end
end end
chip drivers/usb/acpi chip drivers/usb/acpi