From f021952c40673c3b66f39ae8fea8db7265bdfff3 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 18 Apr 2022 12:25:13 +0530 Subject: [PATCH] soc/intel/alderlake: Implement PMC static function lock This patch performs PMC static function lockdown. BUG=b:211954778 TEST=Able to build and boot google/redrix to OS. Verified PMC static PG lock (bit 31) is set. > iotools mmio_read32 0xfe001e20 0x80000000 Signed-off-by: Subrata Banik Change-Id: I68343f9af4f34aceae06293c5f87c5eaa3430a60 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63689 Tested-by: build bot (Jenkins) Reviewed-by: Lean Sheng Tan Reviewed-by: Eric Lai Reviewed-by: Angel Pons --- src/soc/intel/alderlake/include/soc/pmc.h | 3 +++ src/soc/intel/alderlake/lockdown.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/src/soc/intel/alderlake/include/soc/pmc.h b/src/soc/intel/alderlake/include/soc/pmc.h index 52cc0b5e1c..ca11ae933a 100644 --- a/src/soc/intel/alderlake/include/soc/pmc.h +++ b/src/soc/intel/alderlake/include/soc/pmc.h @@ -142,6 +142,9 @@ extern struct device_operations pmc_ops; #define ACPI_EN (1 << 7) #define SCI_IRQ_SEL (7 << 0) +#define ST_PG_FDIS1 0x1e20 +#define ST_FDIS_LOCK (1 << 31) + #define SCIS_IRQ9 0 #define SCIS_IRQ10 1 #define SCIS_IRQ11 2 diff --git a/src/soc/intel/alderlake/lockdown.c b/src/soc/intel/alderlake/lockdown.c index b0da51ffdd..5d012d8e1b 100644 --- a/src/soc/intel/alderlake/lockdown.c +++ b/src/soc/intel/alderlake/lockdown.c @@ -23,6 +23,9 @@ static void pmc_lockdown_cfg(int chipset_lockdown) if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) setbits32(pmcbase + GEN_PMCON_B, SMI_LOCK); + + if (!CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) + setbits32(pmcbase + ST_PG_FDIS1, ST_FDIS_LOCK); } void soc_lockdown_config(int chipset_lockdown)