soc/baytrail: fix ACPI table by recollecting TOLM
Adapted from Chromium commit 8fbe1e7 for soc/braswell (also review.coreboot.org/#/c/20060/); same issue affects baytrail as well. This patch recollects TOLM accessing; as Aaron recalled some core_msr_script turns off access to TOLM register, he suggests to store tolm to avoid getting back a zero while setting acpi nvs space. Change-Id: Ib26d4fe229b3f7d8ee664f5d89774d1f4a997f51 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/20081 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -20,7 +20,7 @@
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#include <device/pci_ids.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <arch/acpi.h>
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#include <stddef.h>
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#include <soc/iomap.h>
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#include <soc/iosf.h>
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#include <soc/pci_devs.h>
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@ -65,7 +65,14 @@
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uint32_t nc_read_top_of_low_memory(void)
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{
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return iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1);
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MAYBE_STATIC uint32_t tolm = 0;
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if (tolm)
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return tolm;
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tolm = iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1);
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return tolm;
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}
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static void nc_read_resources(device_t dev)
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