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drivers/tpm: Force enable long IRQ pulses for Ti50 versions under 0.15. 

Only Cr50 versions starting at 0.5.5 support long IRQ pulses, so this
feature is enabled based on the value of the board_cfg register (see
CB:61722).

However, Ti50 versions below 0.0.15 don't support the board_cfg
register, and trying to access it will cause I2C errors (see CB:63011).
Also, all Ti50 versions only support long IRQ pulses. Therefore, add a
workaround to force enable long IRQ pulses for boards using Ti50
versions under 0.0.15, instead of enabling it based on board_cfg. This
workaround will be removed once all Ti50 stocks are updated to 0.0.15 or
higher.

BUG=b:225941781
TEST=Boot nivviks and nereid to OS with Ti50 0.0.14 and check there are
none of these I2C errors:
[ERROR]  I2C stop bit not received
[ERROR]  cr50_i2c_read: Address write failed
[ERROR]  cr50_i2c_tis_status: Failed to read status

Change-Id: Iaba71461d8ec79e8d6efddbd505339cdf1176485
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63160
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Reka Norman 2022-03-29 09:55:57 +11:00 committed by Paul Fagerburg
parent e156b2bcec
commit f08e3bb516
1 changed files with 8 additions and 0 deletions
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8
src/drivers/tpm/cr50.c
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@ -142,6 +142,14 @@ enum cb_err cr50_set_board_cfg(void)
bool cr50_is_long_interrupt_pulse_enabled(void) bool cr50_is_long_interrupt_pulse_enabled(void)
{ {
/*
* Ti50 FW versions under 0.15 don't support the board cfg register,
* and all Ti50 versions only support long IRQ pulses.
* TODO: Remove this after all Ti50 stocks uprev to 0.15 or above.
*/
if (CONFIG(MAINBOARD_NEEDS_I2C_TI50_WORKAROUND))
return true;
return !!(cr50_get_board_cfg() & CR50_BOARD_CFG_100US_READY_PULSE); return !!(cr50_get_board_cfg() & CR50_BOARD_CFG_100US_READY_PULSE);
} }