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fix newly introduced printk_foo warnings.. 

Interesting enough, console_printk was only used in a single place and
duplicated a large part of console.h which is included in the same place.
Thus, just drop console_printk.c and we're one down with console complexity

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-03-23 13:23:40 +00:00 committed by Stefan Reinauer
parent 0b2cda82b4
commit f0aa09b51b
6 changed files with 105 additions and 223 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/arch/i386/lib/console.c
View File

@ -5,7 +5,6 @@
#include "console_print.c" #include "console_print.c"
#else /* CONFIG_USE_PRINTK_IN_CAR == 1 */ #else /* CONFIG_USE_PRINTK_IN_CAR == 1 */
#include <console/console.h> #include <console/console.h>
#include "console_printk.c"
#endif /* CONFIG_USE_PRINTK_IN_CAR */ #endif /* CONFIG_USE_PRINTK_IN_CAR */
void console_init(void) void console_init(void)

99
src/arch/i386/lib/console_printk.c
View File

@ -1,99 +0,0 @@
#define printk(BIOS_EMERG, fmt, arg...) do_printk(BIOS_EMERG ,fmt, ##arg)
#define printk(BIOS_ALERT, fmt, arg...) do_printk(BIOS_ALERT ,fmt, ##arg)
#define printk_crit(fmt, arg...) do_printk(BIOS_CRIT ,fmt, ##arg)
#define printk(BIOS_ERR, fmt, arg...) do_printk(BIOS_ERR ,fmt, ##arg)
#define printk(BIOS_WARNING, fmt, arg...) do_printk(BIOS_WARNING ,fmt, ##arg)
#define printk_notice(fmt, arg...) do_printk(BIOS_NOTICE ,fmt, ##arg)
#define printk(BIOS_INFO, fmt, arg...) do_printk(BIOS_INFO ,fmt, ##arg)
#define printk(BIOS_DEBUG, fmt, arg...) do_printk(BIOS_DEBUG ,fmt, ##arg)
#define printk(BIOS_SPEW, fmt, arg...) do_printk(BIOS_SPEW ,fmt, ##arg)
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_EMERG
#undef printk_emerg
#define printk(BIOS_EMERG, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_ALERT
#undef printk_alert
#define printk(BIOS_ALERT, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_CRIT
#undef printk_crit
#define printk_crit(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_ERR
#undef printk_err
#define printk(BIOS_ERR, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_WARNING
#undef printk_warning
#define printk(BIOS_WARNING, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_NOTICE
#undef printk_notice
#define printk_notice(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_INFO
#undef printk_info
#define printk(BIOS_INFO, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_DEBUG
#undef printk_debug
#define printk(BIOS_DEBUG, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_SPEW
#undef printk_spew
#define printk(BIOS_SPEW, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#define print_emerg(STR) printk_emerg ("%s", (STR))
#define print_alert(STR) printk_alert ("%s", (STR))
#define print_crit(STR) printk_crit ("%s", (STR))
#define print_err(STR) printk_err ("%s", (STR))
#define print_warning(STR) printk(BIOS_WARNING, "%s", (STR))
#define print_notice(STR) printk_notice ("%s", (STR))
#define print_info(STR) printk_info ("%s", (STR))
#define print_debug(STR) printk_debug ("%s", (STR))
#define print_spew(STR) printk_spew ("%s", (STR))
#define print_emerg_char(CH) printk_emerg ("%c", (CH))
#define print_alert_char(CH) printk_alert ("%c", (CH))
#define print_crit_char(CH) printk_crit ("%c", (CH))
#define print_err_char(CH) printk_err ("%c", (CH))
#define print_warning_char(CH) printk(BIOS_WARNING, "%c", (CH))
#define print_notice_char(CH) printk_notice ("%c", (CH))
#define print_info_char(CH) printk_info ("%c", (CH))
#define print_debug_char(CH) printk_debug ("%c", (CH))
#define print_spew_char(CH) printk_spew ("%c", (CH))
#define print_emerg_hex8(HEX) printk_emerg ("%02x", (HEX))
#define print_alert_hex8(HEX) printk_alert ("%02x", (HEX))
#define print_crit_hex8(HEX) printk_crit ("%02x", (HEX))
#define print_err_hex8(HEX) printk_err ("%02x", (HEX))
#define print_warning_hex8(HEX) printk(BIOS_WARNING, "%02x", (HEX))
#define print_notice_hex8(HEX) printk_notice ("%02x", (HEX))
#define print_info_hex8(HEX) printk_info ("%02x", (HEX))
#define print_debug_hex8(HEX) printk_debug ("%02x", (HEX))
#define print_spew_hex8(HEX) printk_spew ("%02x", (HEX))
#define print_emerg_hex16(HEX) printk_emerg ("%04x", (HEX))
#define print_alert_hex16(HEX) printk_alert ("%04x", (HEX))
#define print_crit_hex16(HEX) printk_crit ("%04x", (HEX))
#define print_err_hex16(HEX) printk_err ("%04x", (HEX))
#define print_warning_hex16(HEX) printk(BIOS_WARNING, "%04x", (HEX))
#define print_notice_hex16(HEX) printk_notice ("%04x", (HEX))
#define print_info_hex16(HEX) printk_info ("%04x", (HEX))
#define print_debug_hex16(HEX) printk_debug ("%04x", (HEX))
#define print_spew_hex16(HEX) printk_spew ("%04x", (HEX))
#define print_emerg_hex32(HEX) printk_emerg ("%08x", (HEX))
#define print_alert_hex32(HEX) printk_alert ("%08x", (HEX))
#define print_crit_hex32(HEX) printk_crit ("%08x", (HEX))
#define print_err_hex32(HEX) printk_err ("%08x", (HEX))
#define print_warning_hex32(HEX) printk(BIOS_WARNING, "%08x", (HEX))
#define print_notice_hex32(HEX) printk_notice ("%08x", (HEX))
#define print_info_hex32(HEX) printk_info ("%08x", (HEX))
#define print_debug_hex32(HEX) printk_debug ("%08x", (HEX))
#define print_spew_hex32(HEX) printk_spew ("%08x", (HEX))

162
src/include/console/console.h
View File

@ -29,104 +29,86 @@ extern struct console_driver econsole_drivers[];
extern int console_loglevel; extern int console_loglevel;
int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3))); int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
#define printk(x...) do_printk(x) #undef WE_CLEANED_UP_ALL_SIDE_EFFECTS
/* We saw some strange effects in the past like coreboot crashing while
* disabling cache as ram for a maximum console log level of 6 and above while
* it worked fine without. In order to catch such issues reliably we are
* always doing a function call to do_printk with the full number of arguments.
* This slightly increases the code size and some unprinted strings will end
* up in the final coreboot binary (most of them compressed). If you want to
* avoid this, do a
* #define WE_CLEANED_UP_ALL_SIDE_EFFECTS
*/
#ifdef WE_CLEANED_UP_ALL_SIDE_EFFECTS
#define printk_emerg(fmt, arg...) do_printk(BIOS_EMERG ,fmt, ##arg) #define printk(LEVEL, fmt, args...) \
#define printk_alert(fmt, arg...) do_printk(BIOS_ALERT ,fmt, ##arg) do { \
#define printk_crit(fmt, arg...) do_printk(BIOS_CRIT ,fmt, ##arg) if (CONFIG_MAXIMUM_CONSOLE_LOGLEVEL >= LEVEL) { \
#define printk_err(fmt, arg...) do_printk(BIOS_ERR ,fmt, ##arg) do_printk(LEVEL, fmt, ##args); \
#define printk_warning(fmt, arg...) do_printk(BIOS_WARNING ,fmt, ##arg) } \
#define printk_notice(fmt, arg...) do_printk(BIOS_NOTICE ,fmt, ##arg) } while(0)
#define printk_info(fmt, arg...) do_printk(BIOS_INFO ,fmt, ##arg)
#define printk_debug(fmt, arg...) do_printk(BIOS_DEBUG ,fmt, ##arg)
#define printk_spew(fmt, arg...) do_printk(BIOS_SPEW ,fmt, ##arg)
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_EMERG #else
#undef printk_emerg
#define printk_emerg(fmt, arg...) do {} while(0) #define printk(LEVEL, fmt, args...) \
#endif do { \
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_ALERT if (CONFIG_MAXIMUM_CONSOLE_LOGLEVEL >= LEVEL) { \
#undef printk_alert do_printk(LEVEL, fmt, ##args); \
#define printk_alert(fmt, arg...) do {} while(0) } else { \
#endif do_printk(BIOS_NEVER, fmt, ##args); \
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_CRIT } \
#undef printk_crit } while(0)
#define printk_crit(fmt, arg...) do {} while(0)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_ERR
#undef printk_err
#define printk_err(fmt, arg...) do {} while(0)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_WARNING
#undef printk_warning
#define printk_warning(fmt, arg...) do {} while(0)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_NOTICE
#undef printk_notice
#define printk_notice(fmt, arg...) do {} while(0)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_INFO
#undef printk_info
#define printk_info(fmt, arg...) do {} while(0)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_DEBUG
#undef printk_debug
#define printk_debug(fmt, arg...) do {} while(0)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_SPEW
#undef printk_spew
#define printk_spew(fmt, arg...) do {} while(0)
#endif #endif
#define print_emerg(STR) printk_emerg ("%s", (STR)) #define print_emerg(STR) printk(BIOS_EMERG, "%s", (STR))
#define print_alert(STR) printk_alert ("%s", (STR)) #define print_alert(STR) printk(BIOS_ALERT, "%s", (STR))
#define print_crit(STR) printk_crit ("%s", (STR)) #define print_crit(STR) printk(BIOS_CRIT, "%s", (STR))
#define print_err(STR) printk_err ("%s", (STR)) #define print_err(STR) printk(BIOS_ERR, "%s", (STR))
#define print_warning(STR) printk_warning("%s", (STR)) #define print_warning(STR) printk(BIOS_WARNING,"%s", (STR))
#define print_notice(STR) printk_notice ("%s", (STR)) #define print_notice(STR) printk(BIOS_NOTICE, "%s", (STR))
#define print_info(STR) printk_info ("%s", (STR)) #define print_info(STR) printk(BIOS_INFO, "%s", (STR))
#define print_debug(STR) printk_debug ("%s", (STR)) #define print_debug(STR) printk(BIOS_DEBUG, "%s", (STR))
#define print_spew(STR) printk_spew ("%s", (STR)) #define print_spew(STR) printk(BIOS_SPEW, "%s", (STR))
#define print_emerg_char(CH) printk_emerg ("%c", (CH)) #define print_emerg_char(CH) printk(BIOS_EMERG, "%c", (CH))
#define print_alert_char(CH) printk_alert ("%c", (CH)) #define print_alert_char(CH) printk(BIOS_ALERT, "%c", (CH))
#define print_crit_char(CH) printk_crit ("%c", (CH)) #define print_crit_char(CH) printk(BIOS_CRIT, "%c", (CH))
#define print_err_char(CH) printk_err ("%c", (CH)) #define print_err_char(CH) printk(BIOS_ERR, "%c", (CH))
#define print_warning_char(CH) printk_warning("%c", (CH)) #define print_warning_char(CH) printk(BIOS_WARNING,"%c", (CH))
#define print_notice_char(CH) printk_notice ("%c", (CH)) #define print_notice_char(CH) printk(BIOS_NOTICE, "%c", (CH))
#define print_info_char(CH) printk_info ("%c", (CH)) #define print_info_char(CH) printk(BIOS_INFO, "%c", (CH))
#define print_debug_char(CH) printk_debug ("%c", (CH)) #define print_debug_char(CH) printk(BIOS_DEBUG, "%c", (CH))
#define print_spew_char(CH) printk_spew ("%c", (CH)) #define print_spew_char(CH) printk(BIOS_SPEW, "%c", (CH))
#define print_emerg_hex8(HEX) printk_emerg ("%02x", (HEX)) #define print_emerg_hex8(HEX) printk(BIOS_EMERG, "%02x", (HEX))
#define print_alert_hex8(HEX) printk_alert ("%02x", (HEX)) #define print_alert_hex8(HEX) printk(BIOS_ALERT, "%02x", (HEX))
#define print_crit_hex8(HEX) printk_crit ("%02x", (HEX)) #define print_crit_hex8(HEX) printk(BIOS_CRIT, "%02x", (HEX))
#define print_err_hex8(HEX) printk_err ("%02x", (HEX)) #define print_err_hex8(HEX) printk(BIOS_ERR, "%02x", (HEX))
#define print_warning_hex8(HEX) printk_warning("%02x", (HEX)) #define print_warning_hex8(HEX) printk(BIOS_WARNING,"%02x", (HEX))
#define print_notice_hex8(HEX) printk_notice ("%02x", (HEX)) #define print_notice_hex8(HEX) printk(BIOS_NOTICE, "%02x", (HEX))
#define print_info_hex8(HEX) printk_info ("%02x", (HEX)) #define print_info_hex8(HEX) printk(BIOS_INFO, "%02x", (HEX))
#define print_debug_hex8(HEX) printk_debug ("%02x", (HEX)) #define print_debug_hex8(HEX) printk(BIOS_DEBUG, "%02x", (HEX))
#define print_spew_hex8(HEX) printk_spew ("%02x", (HEX)) #define print_spew_hex8(HEX) printk(BIOS_SPEW, "%02x", (HEX))
#define print_emerg_hex16(HEX) printk_emerg ("%04x", (HEX)) #define print_emerg_hex16(HEX) printk(BIOS_EMERG, "%04x", (HEX))
#define print_alert_hex16(HEX) printk_alert ("%04x", (HEX)) #define print_alert_hex16(HEX) printk(BIOS_ALERT, "%04x", (HEX))
#define print_crit_hex16(HEX) printk_crit ("%04x", (HEX)) #define print_crit_hex16(HEX) printk(BIOS_CRIT, "%04x", (HEX))
#define print_err_hex16(HEX) printk_err ("%04x", (HEX)) #define print_err_hex16(HEX) printk(BIOS_ERR, "%04x", (HEX))
#define print_warning_hex16(HEX) printk_warning("%04x", (HEX)) #define print_warning_hex16(HEX) printk(BIOS_WARNING,"%04x", (HEX))
#define print_notice_hex16(HEX) printk_notice ("%04x", (HEX)) #define print_notice_hex16(HEX) printk(BIOS_NOTICE, "%04x", (HEX))
#define print_info_hex16(HEX) printk_info ("%04x", (HEX)) #define print_info_hex16(HEX) printk(BIOS_INFO, "%04x", (HEX))
#define print_debug_hex16(HEX) printk_debug ("%04x", (HEX)) #define print_debug_hex16(HEX) printk(BIOS_DEBUG, "%04x", (HEX))
#define print_spew_hex16(HEX) printk_spew ("%04x", (HEX)) #define print_spew_hex16(HEX) printk(BIOS_SPEW, "%04x", (HEX))
#define print_emerg_hex32(HEX) printk_emerg ("%08x", (HEX)) #define print_emerg_hex32(HEX) printk(BIOS_EMERG, "%08x", (HEX))
#define print_alert_hex32(HEX) printk_alert ("%08x", (HEX)) #define print_alert_hex32(HEX) printk(BIOS_ALERT, "%08x", (HEX))
#define print_crit_hex32(HEX) printk_crit ("%08x", (HEX)) #define print_crit_hex32(HEX) printk(BIOS_CRIT, "%08x", (HEX))
#define print_err_hex32(HEX) printk_err ("%08x", (HEX)) #define print_err_hex32(HEX) printk(BIOS_ERR, "%08x", (HEX))
#define print_warning_hex32(HEX) printk_warning("%08x", (HEX)) #define print_warning_hex32(HEX) printk(BIOS_WARNING,"%08x", (HEX))
#define print_notice_hex32(HEX) printk_notice ("%08x", (HEX)) #define print_notice_hex32(HEX) printk(BIOS_NOTICE, "%08x", (HEX))
#define print_info_hex32(HEX) printk_info ("%08x", (HEX)) #define print_info_hex32(HEX) printk(BIOS_INFO, "%08x", (HEX))
#define print_debug_hex32(HEX) printk_debug ("%08x", (HEX)) #define print_debug_hex32(HEX) printk(BIOS_DEBUG, "%08x", (HEX))
#define print_spew_hex32(HEX) printk_spew ("%08x", (HEX)) #define print_spew_hex32(HEX) printk(BIOS_SPEW, "%08x", (HEX))
#if CONFIG_CONSOLE_VGA == 1 #if CONFIG_CONSOLE_VGA == 1
void vga_console_init(void); void vga_console_init(void);

3
src/include/console/loglevel.h
View File

@ -15,6 +15,7 @@
#define BIOS_NOTICE 5 /* normal but significant condition */ #define BIOS_NOTICE 5 /* normal but significant condition */
#define BIOS_INFO 6 /* informational */ #define BIOS_INFO 6 /* informational */
#define BIOS_DEBUG 7 /* debug-level messages */ #define BIOS_DEBUG 7 /* debug-level messages */
#define BIOS_SPEW 8 /* Way too many details */ #define BIOS_SPEW 8 /* way too many details */
#define BIOS_NEVER 9 /* these messages are never printed */
#endif /* LOGLEVEL_H */ #endif /* LOGLEVEL_H */

51
src/southbridge/amd/rs780/rs780_gfx.c
View File

@ -55,7 +55,7 @@ static u32 clkind_read(device_t dev, u32 index)
static void clkind_write(device_t dev, u32 index, u32 data) static void clkind_write(device_t dev, u32 index, u32 data)
{ {
u32 gfx_bar2 = pci_read_config32(dev, 0x18) & ~0xF; u32 gfx_bar2 = pci_read_config32(dev, 0x18) & ~0xF;
/* printk(BIOS_INFO, "gfx bar 2 %02x\n", gfx_bar2); */ /* printk(BIOS_DEBUG, "gfx bar 2 %02x\n", gfx_bar2); */
*(u32*)(gfx_bar2+CLK_CNTL_INDEX) = index | 1<<7; *(u32*)(gfx_bar2+CLK_CNTL_INDEX) = index | 1<<7;
*(u32*)(gfx_bar2+CLK_CNTL_DATA) = data; *(u32*)(gfx_bar2+CLK_CNTL_DATA) = data;
@ -67,7 +67,7 @@ static void clkind_write(device_t dev, u32 index, u32 data)
*/ */
static void rs780_gfx_read_resources(device_t dev) static void rs780_gfx_read_resources(device_t dev)
{ {
printk(BIOS_INFO, "rs780_gfx_read_resources.\n"); printk(BIOS_DEBUG, "rs780_gfx_read_resources.\n");
/* The initial value of 0x24 is 0xFFFFFFFF, which is confusing. /* The initial value of 0x24 is 0xFFFFFFFF, which is confusing.
Even if we write 0xFFFFFFFF into it, it will be 0xFFF00000, Even if we write 0xFFFFFFFF into it, it will be 0xFFF00000,
@ -307,7 +307,7 @@ static void internal_gfx_pci_dev_init(struct device *dev)
deviceid = pci_read_config16(dev, PCI_DEVICE_ID); deviceid = pci_read_config16(dev, PCI_DEVICE_ID);
vendorid = pci_read_config16(dev, PCI_VENDOR_ID); vendorid = pci_read_config16(dev, PCI_VENDOR_ID);
printk(BIOS_INFO, "internal_gfx_pci_dev_init device=%x, vendor=%x.\n", printk(BIOS_DEBUG, "internal_gfx_pci_dev_init device=%x, vendor=%x.\n",
deviceid, vendorid); deviceid, vendorid);
command = pci_read_config16(dev, 0x04); command = pci_read_config16(dev, 0x04);
@ -583,10 +583,10 @@ static void rs780_internal_gfx_enable(device_t dev)
u32 FB_Start, FB_End; u32 FB_Start, FB_End;
#endif #endif
printk(BIOS_INFO, "rs780_internal_gfx_enable dev = 0x%p, nb_dev = 0x%p.\n", dev, nb_dev); printk(BIOS_DEBUG, "rs780_internal_gfx_enable dev = 0x%p, nb_dev = 0x%p.\n", dev, nb_dev);
sysmem = rdmsr(0xc001001a); sysmem = rdmsr(0xc001001a);
printk(BIOS_INFO, "sysmem = %x_%x\n", sysmem.hi, sysmem.lo); printk(BIOS_DEBUG, "sysmem = %x_%x\n", sysmem.hi, sysmem.lo);
/* The system top memory in 780. */ /* The system top memory in 780. */
pci_write_config32(nb_dev, 0x90, sysmem.lo); pci_write_config32(nb_dev, 0x90, sysmem.lo);
@ -824,12 +824,12 @@ static void single_port_configuration(device_t nb_dev, device_t dev)
struct southbridge_amd_rs780_config *cfg = struct southbridge_amd_rs780_config *cfg =
(struct southbridge_amd_rs780_config *)nb_dev->chip_info; (struct southbridge_amd_rs780_config *)nb_dev->chip_info;
printk(BIOS_INFO, "rs780_gfx_init single_port_configuration.\n"); printk(BIOS_DEBUG, "rs780_gfx_init single_port_configuration.\n");
/* step 12 training, releases hold training for GFX port 0 (device 2) */ /* step 12 training, releases hold training for GFX port 0 (device 2) */
PcieReleasePortTraining(nb_dev, dev, 2); PcieReleasePortTraining(nb_dev, dev, 2);
result = PcieTrainPort(nb_dev, dev, 2); result = PcieTrainPort(nb_dev, dev, 2);
printk(BIOS_INFO, "rs780_gfx_init single_port_configuration step12.\n"); printk(BIOS_DEBUG, "rs780_gfx_init single_port_configuration step12.\n");
/* step 13 Power Down Control */ /* step 13 Power Down Control */
/* step 13.1 Enables powering down transmitter and receiver pads along with PLL macros. */ /* step 13.1 Enables powering down transmitter and receiver pads along with PLL macros. */
@ -866,11 +866,11 @@ static void single_port_configuration(device_t nb_dev, device_t dev)
break; break;
} }
} }
printk(BIOS_INFO, "rs780_gfx_init single_port_configuration step13.\n"); printk(BIOS_DEBUG, "rs780_gfx_init single_port_configuration step13.\n");
/* step 14 Reset Enumeration Timer, disables the shortening of the enumeration timer */ /* step 14 Reset Enumeration Timer, disables the shortening of the enumeration timer */
set_pcie_enable_bits(dev, 0x70, 1 << 19, 1 << 19); set_pcie_enable_bits(dev, 0x70, 1 << 19, 1 << 19);
printk(BIOS_INFO, "rs780_gfx_init single_port_configuration step14.\n"); printk(BIOS_DEBUG, "rs780_gfx_init single_port_configuration step14.\n");
} }
static void dual_port_configuration(device_t nb_dev, device_t dev) static void dual_port_configuration(device_t nb_dev, device_t dev)
@ -980,7 +980,7 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
struct southbridge_amd_rs780_config *cfg = struct southbridge_amd_rs780_config *cfg =
(struct southbridge_amd_rs780_config *)nb_dev->chip_info; (struct southbridge_amd_rs780_config *)nb_dev->chip_info;
printk(BIOS_INFO, "rs780_gfx_init, nb_dev=0x%p, dev=0x%p, port=0x%x.\n", printk(BIOS_DEBUG, "rs780_gfx_init, nb_dev=0x%p, dev=0x%p, port=0x%x.\n",
nb_dev, dev, port); nb_dev, dev, port);
/* GFX Core Initialization */ /* GFX Core Initialization */
@ -1003,7 +1003,7 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
set_nbmisc_enable_bits(nb_dev, 0x28, 3 << 6 | 3 << 8 | 3 << 10, set_nbmisc_enable_bits(nb_dev, 0x28, 3 << 6 | 3 << 8 | 3 << 10,
1 << 6 | 1 << 8 | 1 << 10); 1 << 6 | 1 << 8 | 1 << 10);
reg32 = nbmisc_read_index(nb_dev, 0x28); reg32 = nbmisc_read_index(nb_dev, 0x28);
printk(BIOS_INFO, "misc 28 = %x\n", reg32); printk(BIOS_DEBUG, "misc 28 = %x\n", reg32);
/* 5.9.1.6.Selects the single ended GFX REFCLK to be the source for core logic. */ /* 5.9.1.6.Selects the single ended GFX REFCLK to be the source for core logic. */
set_nbmisc_enable_bits(nb_dev, 0x6C, 1 << 31, 1 << 31); set_nbmisc_enable_bits(nb_dev, 0x6C, 1 << 31, 1 << 31);
@ -1021,7 +1021,7 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
set_nbmisc_enable_bits(nb_dev, 0x28, 3 << 6 | 3 << 8 | 3 << 10, set_nbmisc_enable_bits(nb_dev, 0x28, 3 << 6 | 3 << 8 | 3 << 10,
0); 0);
reg32 = nbmisc_read_index(nb_dev, 0x28); reg32 = nbmisc_read_index(nb_dev, 0x28);
printk(BIOS_INFO, "misc 28 = %x\n", reg32); printk(BIOS_DEBUG, "misc 28 = %x\n", reg32);
/* 5.9.1.6.Selects the single ended GFX REFCLK to be the source for core logic. */ /* 5.9.1.6.Selects the single ended GFX REFCLK to be the source for core logic. */
set_nbmisc_enable_bits(nb_dev, 0x6C, 1 << 31, 0 << 31); set_nbmisc_enable_bits(nb_dev, 0x6C, 1 << 31, 0 << 31);
@ -1062,7 +1062,7 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
/* release hold training for device 2. GFX initialization is done. */ /* release hold training for device 2. GFX initialization is done. */
set_nbmisc_enable_bits(nb_dev, 0x8, 1 << 4, 0 << 4); set_nbmisc_enable_bits(nb_dev, 0x8, 1 << 4, 0 << 4);
dynamic_link_width_control(nb_dev, dev, cfg->gfx_link_width); dynamic_link_width_control(nb_dev, dev, cfg->gfx_link_width);
printk(BIOS_INFO, "rs780_gfx_init step7.\n"); printk(BIOS_DEBUG, "rs780_gfx_init step7.\n");
return; return;
} }
@ -1070,11 +1070,11 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
/* 5.9.12.1 sets RCB timeout to be 25ms */ /* 5.9.12.1 sets RCB timeout to be 25ms */
/* 5.9.12.2. RCB Cpl timeout on link down. */ /* 5.9.12.2. RCB Cpl timeout on link down. */
set_pcie_enable_bits(dev, 0x70, 7 << 16 | 1 << 19, 4 << 16 | 1 << 19); set_pcie_enable_bits(dev, 0x70, 7 << 16 | 1 << 19, 4 << 16 | 1 << 19);
printk(BIOS_INFO, "rs780_gfx_init step5.9.12.1.\n"); printk(BIOS_DEBUG, "rs780_gfx_init step5.9.12.1.\n");
/* step 5.9.12.3 disables slave ordering logic */ /* step 5.9.12.3 disables slave ordering logic */
set_pcie_enable_bits(nb_dev, 0x20, 1 << 8, 1 << 8); set_pcie_enable_bits(nb_dev, 0x20, 1 << 8, 1 << 8);
printk(BIOS_INFO, "rs780_gfx_init step5.9.12.3.\n"); printk(BIOS_DEBUG, "rs780_gfx_init step5.9.12.3.\n");
/* step 5.9.12.4 sets DMA payload size to 64 bytes */ /* step 5.9.12.4 sets DMA payload size to 64 bytes */
set_pcie_enable_bits(nb_dev, 0x10, 7 << 10, 4 << 10); set_pcie_enable_bits(nb_dev, 0x10, 7 << 10, 4 << 10);
@ -1096,7 +1096,7 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
/* 5.9.12.9 CMGOOD_OVERRIDE for end point initiated lane degradation. */ /* 5.9.12.9 CMGOOD_OVERRIDE for end point initiated lane degradation. */
set_nbmisc_enable_bits(nb_dev, 0x6a, 1 << 17, 1 << 17); set_nbmisc_enable_bits(nb_dev, 0x6a, 1 << 17, 1 << 17);
printk(BIOS_INFO, "rs780_gfx_init step5.9.12.9.\n"); printk(BIOS_DEBUG, "rs780_gfx_init step5.9.12.9.\n");
/* 5.9.12.10 Sets the timer in Config state from 20us to */ /* 5.9.12.10 Sets the timer in Config state from 20us to */
/* 5.9.12.11 De-asserts RX_EN in L0s. */ /* 5.9.12.11 De-asserts RX_EN in L0s. */
@ -1169,15 +1169,14 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
if (cfg->gfx_lane_reversal) { if (cfg->gfx_lane_reversal) {
set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2); set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2);
} }
printk_info("rs780_gfx_init step1.\n"); printk(BIOS_DEBUG, "rs780_gfx_init step1.\n");
printk_info("rs780_gfx_init step2.\n");
printk_info("device = %x\n", dev->path.pci.devfn >> 3); printk(BIOS_DEBUG, "device = %x\n", dev->path.pci.devfn >> 3);
if((dev->path.pci.devfn >> 3) == 2) if((dev->path.pci.devfn >> 3) == 2) {
single_port_configuration(nb_dev, dev); single_port_configuration(nb_dev, dev);
else{ } else {
set_nbmisc_enable_bits(nb_dev, 0xc, 0, 0x2 << 2); /* hide the GFX bridge. */ set_nbmisc_enable_bits(nb_dev, 0xc, 0, 0x2 << 2); /* hide the GFX bridge. */
printk_info("If dev3.., single port. Do nothing.\n"); printk(BIOS_INFO, "Single port. Do nothing.\n"); // If dev3
} }
break; break;
@ -1187,17 +1186,17 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2); set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2);
set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 3, 1 << 3); set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 3, 1 << 3);
} }
printk_info("rs780_gfx_init step1.\n"); printk(BIOS_DEBUG, "rs780_gfx_init step1.\n");
/* step 1.1, dual-slot gfx configuration (only need if CMOS option is enabled) */ /* step 1.1, dual-slot gfx configuration (only need if CMOS option is enabled) */
/* AMD calls the configuration CrossFire */ /* AMD calls the configuration CrossFire */
set_nbmisc_enable_bits(nb_dev, 0x0, 0xf << 8, 5 << 8); set_nbmisc_enable_bits(nb_dev, 0x0, 0xf << 8, 5 << 8);
printk_info("rs780_gfx_init step2.\n"); printk(BIOS_DEBUG, "rs780_gfx_init step2.\n");
printk_info("device = %x\n", dev->path.pci.devfn >> 3); printk(BIOS_DEBUG, "device = %x\n", dev->path.pci.devfn >> 3);
dual_port_configuration(nb_dev, dev); dual_port_configuration(nb_dev, dev);
break; break;
default: default:
printk(BIOS_INFO, "Incorrect configuration of external gfx slot.\n"); printk(BIOS_INFO, "Incorrect configuration of external GFX slot.\n");
break; break;
} }
} }

12
src/southbridge/intel/i82801dx/i82801dx_lpc.c
View File

@ -133,7 +133,7 @@ static void i82801dx_power_options(device_t dev)
reg8 &= ~(1 << 3); /* minimum asssertion is 1 to 2 RTCCLK */ reg8 &= ~(1 << 3); /* minimum asssertion is 1 to 2 RTCCLK */
pci_write_config8(dev, GEN_PMCON_3, reg8); pci_write_config8(dev, GEN_PMCON_3, reg8);
printk_info("Set power %s after power failure.\n", state); printk(BIOS_INFO, "Set power %s after power failure.\n", state);
/* Set up NMI on errors. */ /* Set up NMI on errors. */
reg8 = inb(0x61); reg8 = inb(0x61);
@ -147,10 +147,10 @@ static void i82801dx_power_options(device_t dev)
nmi_option = NMI_OFF; nmi_option = NMI_OFF;
get_option(&nmi_option, "nmi"); get_option(&nmi_option, "nmi");
if (nmi_option) { if (nmi_option) {
printk_info ("NMI sources enabled.\n"); printk(BIOS_INFO, "NMI sources enabled.\n");
reg8 &= ~(1 << 7); /* Set NMI. */ reg8 &= ~(1 << 7); /* Set NMI. */
} else { } else {
printk_info ("NMI sources disabled.\n"); printk(BIOS_INFO, "NMI sources disabled.\n");
reg8 |= ( 1 << 7); /* Disable NMI. */ reg8 |= ( 1 << 7); /* Disable NMI. */
} }
outb(reg8, 0x70); outb(reg8, 0x70);
@ -232,7 +232,7 @@ static void enable_hpet(struct device *dev)
u32 reg32, hpet, val; u32 reg32, hpet, val;
/* Set HPET base address and enable it */ /* Set HPET base address and enable it */
printk_debug("Enabling HPET at 0x%x\n", HPET_ADDR); printk(BIOS_DEBUG, "Enabling HPET at 0x%x\n", HPET_ADDR);
reg32 = pci_read_config32(dev, GEN_CNTL); reg32 = pci_read_config32(dev, GEN_CNTL);
/* /*
* Bit 17 is HPET enable bit. * Bit 17 is HPET enable bit.
@ -253,9 +253,9 @@ static void enable_hpet(struct device *dev)
val &= 0x7; val &= 0x7;
if ((val & 0x4) && (hpet == (val & 0x3))) { if ((val & 0x4) && (hpet == (val & 0x3))) {
printk_debug("HPET enabled at 0x%x\n", HPET_ADDR); printk(BIOS_INFO, "HPET enabled at 0x%x\n", HPET_ADDR);
} else { } else {
printk_err("HPET was not enabled correctly\n"); printk(BIOS_WARNING, "HPET was not enabled correctly\n");
reg32 &= ~(1 << 17); /* Clear Enable */ reg32 &= ~(1 << 17); /* Clear Enable */
pci_write_config32(dev, GEN_CNTL, reg32); pci_write_config32(dev, GEN_CNTL, reg32);
} }