mb/google/slippy: Put GPIOs in a C file

This will allow dropping the pointer inside romstage_params.

Change-Id: Iec6dac1a271b22d6c09b4064a9e8a310e57026a6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
This commit is contained in:
Angel Pons 2020-07-03 13:45:33 +02:00
parent 91aae2e0bc
commit f0b5e91b1b
10 changed files with 9 additions and 32 deletions

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@ -7,6 +7,7 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
smm-y += smihandler.c
romstage-y += variants/$(VARIANT_DIR)/gpio.c
romstage-y += variants/$(VARIANT_DIR)/romstage.c
subdirs-y += variants/$(VARIANT_DIR)

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@ -5,8 +5,11 @@
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include "variant.h"
extern const struct pch_lp_gpio_map mainboard_gpio_map[];
void mainboard_config_rcba(void)
{
/*
@ -74,6 +77,7 @@ void mainboard_romstage_entry(void)
struct romstage_params romstage_params = {
.pei_data = &pei_data,
.gpio_map = &mainboard_gpio_map,
};
variant_romstage_entry(&romstage_params);

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@ -1,9 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef FALCO_GPIO_H
#define FALCO_GPIO_H
struct pch_lp_gpio_map;
#include <southbridge/intel/lynxpoint/lp_gpio.h>
const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 0: UNUSED */
@ -103,5 +100,3 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 94: UNUSED */
LP_GPIO_END
};
#endif

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@ -10,7 +10,6 @@
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include <variant/gpio.h>
#include "../../variant.h"
/* Copy SPD data for on-board memory */
@ -86,6 +85,5 @@ void variant_romstage_entry(struct romstage_params *rp)
memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
rp->gpio_map = &mainboard_gpio_map;
rp->copy_spd = copy_spd;
}

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@ -1,9 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef LEON_GPIO_H
#define LEON_GPIO_H
struct pch_lp_gpio_map;
#include <southbridge/intel/lynxpoint/lp_gpio.h>
const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 0: UNUSED */
@ -103,5 +100,3 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 94: UNUSED */
LP_GPIO_END
};
#endif

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@ -9,7 +9,6 @@
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include <variant/gpio.h>
#include "../../variant.h"
/* Copy SPD data for on-board memory */
@ -80,6 +79,5 @@ void variant_romstage_entry(struct romstage_params *rp)
memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
rp->gpio_map = &mainboard_gpio_map;
rp->copy_spd = copy_spd;
}

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@ -1,9 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef PEPPY_GPIO_H
#define PEPPY_GPIO_H
struct pch_lp_gpio_map;
#include <southbridge/intel/lynxpoint/lp_gpio.h>
const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 0: UNUSED */
@ -103,5 +100,3 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 94: UNUSED */
LP_GPIO_END
};
#endif

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@ -10,7 +10,6 @@
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include <variant/gpio.h>
#include "../../onboard.h"
#include "../../variant.h"
@ -97,6 +96,5 @@ void variant_romstage_entry(struct romstage_params *rp)
memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
rp->gpio_map = &mainboard_gpio_map;
rp->copy_spd = copy_spd;
}

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@ -1,9 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef WOLF_GPIO_H
#define WOLF_GPIO_H
struct pch_lp_gpio_map;
#include <southbridge/intel/lynxpoint/lp_gpio.h>
const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 0: UNUSED */
@ -103,5 +100,3 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 94: UNUSED */
LP_GPIO_END
};
#endif

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@ -10,7 +10,6 @@
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include <variant/gpio.h>
#include "../../variant.h"
/* Copy SPD data for on-board memory */
@ -84,6 +83,5 @@ void variant_romstage_entry(struct romstage_params *rp)
memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
rp->gpio_map = &mainboard_gpio_map;
rp->copy_spd = copy_spd;
}