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mb/system76/lemp9: enable TPM 

L140CU has a TPM2 connected via SPI. Add the TPM device to the
devicetree and enable it.

According to Intel doc#615170-001, PIRQ is required for SPI TPM to work.
Since the TPM is connected to GPP_A7, enable NF1 (PIRQA#) and set it as
TPM interrupt in Kconfig.

Note: The PCH maps either LPC TPM or SPI TPM to the same address and
handles either LPC or SPI communication transparently. Thus we can use
MAINBOARD_HAS_LPC_TPM here, which implements TPM via that address.

Tested, but only polling works currently, because there is some upstream
issue with the tpm_tis module in current Linux kernels. [1]

[1] https://bugzilla.redhat.com/show_bug.cgi?id=1770021

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I26d3b396fe1e99368e18fd3a6a9f02e3585b9f6e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43641
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2020-07-19 18:43:27 +02:00 committed by Michael Niewöhner
parent 803bd3c682
commit f0b6b30c46
3 changed files with 14 additions and 16 deletions
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18
src/mainboard/system76/lemp9/Kconfig
View File

@ -10,9 +10,8 @@ config BOARD_SPECIFIC_OPTIONS
select GENERIC_SPD_BIN
select INTEL_GMA_HAVE_VBT
select INTEL_LPSS_UART_FOR_CONSOLE
# Chip select 2 is not yet supported by intel fast_spi
# select MAINBOARD_HAS_SPI_TPM_CR50
# select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_TPM2
select NO_UART_ON_SUPERIO
select SOC_INTEL_COMETLAKE
select SOC_INTEL_COMMON_BLOCK_HDA
@ -77,17 +76,12 @@ config VGA_BIOS_ID
string
default "8086,9b41"
config TPM_PIRQ
hex
default 0x10 # GPP_A7/PIRQA#
config POST_DEVICE
bool
default n
# Chip select 2 is not yet supported by intel fast_spi
#config DRIVER_TPM_SPI_BUS
# hex
# default 0x0
#
#config DRIVER_TPM_SPI_CHIP
# int
# default 2
endif

6
src/mainboard/system76/lemp9/devicetree.cb
View File

@ -238,7 +238,11 @@ chip soc/intel/cannonlake
device pci 1e.1 off end # UART #1
device pci 1e.2 off end # GSPI #0
device pci 1e.3 off end # GSPI #1
device pci 1f.0 on end # LPC Interface
device pci 1f.0 on # LPC Interface
chip drivers/pc80/tpm # TPM
device pnp 0c31.0 on end
end
end
device pci 1f.1 off end # P2SB
device pci 1f.2 off end # Power Management Controller
device pci 1f.3 on end # Intel HDA

4
src/mainboard/system76/lemp9/gpio.h
View File

@ -76,8 +76,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
// GSPI0
// TODO - TPM_PIRQ#
PAD_CFG_NC(GPP_A7),
// PIRQA# / TPM_PIRQ#
PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
// LPC
// PM_CLKRUN# with pull-up