intel/common/acpi: Fix ACPI debug log issue with LPSS UART

This patch fixes ACPI debug print issue reported internally
while using APRT asl method. Potentially some junk characters
gets added into final print buffer due to LPSS MMIO register
space is 32 bit width and ADBG is one byte at a time.

TEST=Built and boo eve to ensure to be able to get ASL console
log without any corruption.

Change-Id: I0b6af789c0ffc79f7fee4652b4aa6a125b182296
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20009
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Subrata Banik 2017-06-02 10:18:09 +05:30 committed by Aaron Durbin
parent 9121a364a6
commit f0c7be4e63
1 changed files with 14 additions and 7 deletions

View File

@ -41,7 +41,8 @@ Method (APRT, 1, Serialized)
Name(ADBG, Buffer(256) {0})
If (LEqual(ObjectType(Arg0), 1)) { /* Integer */
ToHexString(Arg0, ADBG)
ToHexString(Arg0, Local0)
Store(Local0, ADBG)
} ElseIf (LEqual(ObjectType(Arg0), 2)) { /* String */
Store(Arg0, ADBG)
} ElseIf (LEqual(ObjectType(Arg0), 3)) { /* Buffer */
@ -60,12 +61,18 @@ Method (APRT, 1, Serialized)
OperationRegion (UBAR, SystemMemory, UART_DEBUG_BASE_ADDRESS, 24)
Field (UBAR, AnyAcc, NoLock, Preserve)
{
TDR, 32, /* Transmit Data Register BAR + 0x000 */
IER, 32, /* Interrupt Enable Register BAR + 0x004 */
IIR, 32, /* Interrupt Identification Register BAR + 0x008 */
LCR, 32, /* Line Control Register BAR + 0x00C */
MCR, 32, /* Modem Control Register BAR + 0x010 */
LSR, 32 /* Line Status Register BAR + 0x014 */
TDR, 8, /* Transmit Data Register BAR + 0x000 */
, 24,
IER, 8, /* Interrupt Enable Register BAR + 0x004 */
, 24,
IIR, 8, /* Interrupt Identification Register BAR + 0x008 */
, 24,
LCR, 8, /* Line Control Register BAR + 0x00C */
, 24,
MCR, 8, /* Modem Control Register BAR + 0x010 */
, 24,
LSR, 8, /* Line Status Register BAR + 0x014 */
, 24
}
#else
OperationRegion (UBAR, SystemIO, LURT (CONFIG_UART_FOR_CONSOLE), 6)