tegra124: Change all SoC headers to <soc/headername.h> system

This patch aligns tegra124 to the new SoC header include scheme.
Also alphabetized headers in affected files since we touch them anyway.

BUG=None
TEST=Tested with whole series. Compiled Nyan, Nyan_Big and Nyan_Blaze.

Change-Id: Ia82ab86b2af903690cc6c9d310f7bdda3425ea7c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4d23774e071ec22781991ff20fbf63802f620c88
Original-Change-Id: Ia126cff8590117788d1872e50608c257d2659c1f
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/224504
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9326
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Julius Werner 2014-10-20 13:24:14 -07:00 committed by Patrick Georgi
parent 73d1ed66d3
commit f0d21ff3da
72 changed files with 186 additions and 185 deletions

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@ -17,10 +17,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <boardid.h>
#include <console/console.h>
#include <soc/gpio.h>
uint8_t board_id(void)
{

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@ -22,12 +22,12 @@
#include <console/console.h>
#include <device/i2c.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/pinmux.h>
#include <soc/nvidia/tegra124/spi.h> /* FIXME: move back to soc code? */
#include <soc/pinmux.h>
#include <soc/spi.h> /* FIXME: move back to soc code? */
#include "pmic.h"

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@ -18,13 +18,13 @@
*/
#include <boot/coreboot_tables.h>
#include <bootmode.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <soc/gpio.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <bootmode.h>
#include <soc/nvidia/tegra124/gpio.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{

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@ -19,9 +19,9 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/early_configs.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/early_configs.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;

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@ -23,13 +23,13 @@
#include <boot/coreboot_tables.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/clk_rst.h>
#include <soc/gpio.h>
#include <soc/mc.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/mc.h>
#include <soc/nvidia/tegra124/pmc.h>
#include <soc/nvidia/tegra124/spi.h>
#include <soc/nvidia/tegra/usb.h>
#include <soc/pmc.h>
#include <soc/spi.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>

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@ -1 +1 @@
#include <soc/nvidia/tegra124/memlayout.ld>
#include <soc/memlayout.ld>

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@ -18,16 +18,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boardid.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c.h>
#include <stdint.h>
#include <stdlib.h>
#include <boardid.h>
#include "pmic.h"
#include <reset.h>
#include "pmic.h"
enum {
AS3722_I2C_ADDR = 0x40
};

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@ -18,7 +18,7 @@
*/
#include <arch/io.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/gpio.h>
#include <reset.h>
void hard_reset(void)

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@ -27,20 +27,21 @@
#include <reset.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/cache.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/early_configs.h>
#include <soc/nvidia/tegra124/power.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/addressmap.h>
#include <soc/cache.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/early_configs.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/power.h>
#include <soc/sdram.h>
#include <symbols.h>
#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
static void __attribute__((noinline)) romstage(void)
{

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@ -18,7 +18,8 @@
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/sdram.h>
#include "sdram_configs.h"
static struct sdram_params sdram_configs[] = {

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@ -20,7 +20,7 @@
#ifndef __MAINBOARD_GOOGLE_NYAN_SDRAM_CONFIG_H__
#define __MAINBOARD_GOOGLE_NYAN_SDRAM_CONFIG_H__
#include <soc/nvidia/tegra124/sdram_param.h>
#include <soc/sdram_param.h>
/* Loads SDRAM configurations for current system. */
const struct sdram_params *get_sdram_config(void);

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@ -17,11 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <stdlib.h>
#include <boardid.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <stdlib.h>
uint8_t board_id(void)
{

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@ -22,12 +22,12 @@
#include <console/console.h>
#include <device/i2c.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/pinmux.h>
#include <soc/nvidia/tegra124/spi.h> /* FIXME: move back to soc code? */
#include <soc/pinmux.h>
#include <soc/spi.h> /* FIXME: move back to soc code? */
#include "pmic.h"

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@ -18,13 +18,13 @@
*/
#include <boot/coreboot_tables.h>
#include <bootmode.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <soc/gpio.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <bootmode.h>
#include <soc/nvidia/tegra124/gpio.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{

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@ -19,9 +19,9 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/early_configs.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/early_configs.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;

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@ -18,17 +18,17 @@
*/
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <device/device.h>
#include <elog.h>
#include <boot/coreboot_tables.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/mc.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/mc.h>
#include <soc/nvidia/tegra124/pmc.h>
#include <soc/nvidia/tegra124/spi.h>
#include <soc/pmc.h>
#include <soc/spi.h>
#include <soc/nvidia/tegra/usb.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>

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@ -1 +1 @@
#include <soc/nvidia/tegra124/memlayout.ld>
#include <soc/memlayout.ld>

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@ -18,16 +18,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boardid.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c.h>
#include <stdint.h>
#include <stdlib.h>
#include <boardid.h>
#include "pmic.h"
#include <reset.h>
#include "pmic.h"
enum {
AS3722_I2C_ADDR = 0x40
};

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@ -18,7 +18,7 @@
*/
#include <arch/io.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/gpio.h>
#include <reset.h>
void hard_reset(void)

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@ -27,20 +27,21 @@
#include <reset.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/cache.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/early_configs.h>
#include <soc/nvidia/tegra124/power.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/addressmap.h>
#include <soc/cache.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/early_configs.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/power.h>
#include <soc/sdram.h>
#include <symbols.h>
#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
static void __attribute__((noinline)) romstage(void)
{

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@ -18,7 +18,8 @@
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/sdram.h>
#include "sdram_configs.h"
static struct sdram_params sdram_configs[] = {

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@ -20,7 +20,7 @@
#ifndef __MAINBOARD_GOOGLE_NYAN_BIG_SDRAM_CONFIG_H__
#define __MAINBOARD_GOOGLE_NYAN_BIG_SDRAM_CONFIG_H__
#include <soc/nvidia/tegra124/sdram_param.h>
#include <soc/sdram_param.h>
/* Loads SDRAM configurations for current system. */
const struct sdram_params *get_sdram_config(void);

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@ -17,11 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <stdlib.h>
#include <boardid.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <stdlib.h>
uint8_t board_id(void)
{

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@ -22,12 +22,12 @@
#include <console/console.h>
#include <device/i2c.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/pinmux.h>
#include <soc/nvidia/tegra124/spi.h> /* FIXME: move back to soc code? */
#include <soc/pinmux.h>
#include <soc/spi.h> /* FIXME: move back to soc code? */
#include "pmic.h"

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@ -21,9 +21,9 @@
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <soc/gpio.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/nvidia/tegra124/gpio.h>
//enum {
// ACTIVE_LOW = 0,

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@ -19,9 +19,9 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/early_configs.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/early_configs.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;

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@ -18,18 +18,18 @@
*/
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <device/device.h>
#include <elog.h>
#include <boot/coreboot_tables.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/clk_rst.h>
#include <soc/gpio.h>
#include <soc/mc.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/mc.h>
#include <soc/nvidia/tegra124/pmc.h>
#include <soc/nvidia/tegra124/spi.h>
#include <soc/nvidia/tegra/usb.h>
#include <soc/pmc.h>
#include <soc/spi.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>

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@ -1 +1 @@
#include <soc/nvidia/tegra124/memlayout.ld>
#include <soc/memlayout.ld>

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@ -18,16 +18,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boardid.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c.h>
#include <stdint.h>
#include <stdlib.h>
#include <boardid.h>
#include "pmic.h"
#include <reset.h>
#include "pmic.h"
enum {
AS3722_I2C_ADDR = 0x40
};

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@ -18,7 +18,7 @@
*/
#include <arch/io.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/gpio.h>
#include <reset.h>
void hard_reset(void)

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@ -27,20 +27,21 @@
#include <reset.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/cache.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/early_configs.h>
#include <soc/nvidia/tegra124/power.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/addressmap.h>
#include <soc/cache.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/early_configs.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/power.h>
#include <soc/sdram.h>
#include <symbols.h>
#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
static void __attribute__((noinline)) romstage(void)
{

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@ -18,7 +18,8 @@
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/sdram.h>
#include "sdram_configs.h"
static struct sdram_params sdram_configs[] = {

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@ -20,7 +20,7 @@
#ifndef __MAINBOARD_GOOGLE_NYAN_BLAZE_SDRAM_CONFIG_H__
#define __MAINBOARD_GOOGLE_NYAN_BLAZE_SDRAM_CONFIG_H__
#include <soc/nvidia/tegra124/sdram_param.h>
#include <soc/sdram_param.h>
/* Loads SDRAM configurations for current system. */
const struct sdram_params *get_sdram_config(void);

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@ -17,6 +17,8 @@
#ifndef __SOC_NVIDIA_TEGRA_DISPLAYPORT_H__
#define __SOC_NVIDIA_TEGRA_DISPLAYPORT_H__
#include <soc/sor.h>
/* things we can't get rid of just yet. */
#define DPAUX_INTR_EN_AUX (0x1)
#define DPAUX_INTR_AUX (0x5)

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@ -18,8 +18,8 @@
*/
#include <device/i2c.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/pinmux.h>
#include <soc/gpio.h>
#include <soc/pinmux.h>
#include "i2c.h"

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@ -25,9 +25,9 @@
#include <program_loading.h>
#include <soc/clock.h>
#include <soc/nvidia/tegra/apbmisc.h>
#include <soc/pinmux.h>
#include <soc/power.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "pinmux.h"
#include "power.h"
static void run_next_stage(void *entry)
{

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@ -18,8 +18,8 @@
*/
#include <arch/cache.h>
#include <soc/cache.h>
#include <stdint.h>
#include "cache.h"
enum {
L2CTLR_ECC_PARITY = 0x1 << 21,

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@ -19,10 +19,9 @@
#include <cbfs.h> /* This driver serves as a CBFS media source. */
#include <soc/spi.h>
#include <symbols.h>
#include "spi.h"
int init_default_cbfs_media(struct cbfs_media *media)
{
return initialize_tegra_spi_cbfs_media(media,

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@ -19,7 +19,7 @@
#include <cbmem.h>
#include <soc/display.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/sdram.h>
void *cbmem_top(void)
{

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@ -21,7 +21,7 @@
#define __SOC_NVIDIA_TEGRA124_CHIP_H__
#include <arch/cache.h>
#include <soc/addressmap.h>
#include "gpio.h"
#include <soc/gpio.h>
#define EFAULT 1
#define EINVAL 2

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@ -14,19 +14,19 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <arch/clock.h>
#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <arch/io.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/flow.h>
#include <soc/maincpu.h>
#include <soc/pmc.h>
#include <soc/sysctr.h>
#include <stdlib.h>
#include <symbols.h>
#include <arch/clock.h>
#include "clk_rst.h"
#include "flow.h"
#include "maincpu.h"
#include "pmc.h"
#include "sysctr.h"
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;
static struct flow_ctlr *flow = (void *)TEGRA_FLOW_BASE;

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@ -17,26 +17,27 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <arch/io.h>
#include <stdint.h>
#include <lib.h>
#include <stdlib.h>
#include <delay.h>
#include <soc/addressmap.h>
#include <device/device.h>
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
#include <boot/tables.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <delay.h>
#include <device/device.h>
#include <edid.h>
#include <lib.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/sdram.h>
#include <soc/nvidia/tegra/dc.h>
#include <soc/nvidia/tegra/pwm.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdlib.h>
#include <string.h>
#include "chip.h"
#include <soc/display.h>
struct tegra_dc dc_data;

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@ -16,15 +16,13 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <arch/io.h>
#include <console/console.h>
#include <inttypes.h>
#include <soc/addressmap.h>
#include <soc/dma.h>
#include <stddef.h>
#include <stdlib.h>
#include <console/console.h>
#include <arch/io.h>
#include <soc/addressmap.h>
#include "dma.h"
struct apb_dma * const apb_dma = (struct apb_dma *)TEGRA_APB_DMA_BASE;

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@ -17,18 +17,19 @@
#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
#include <device/i2c.h>
#include <edid.h>
#include <stdlib.h>
#include <string.h>
#include <delay.h>
#include <soc/addressmap.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra/dc.h>
#include "chip.h"
#include "sor.h"
#include <soc/nvidia/tegra/displayport.h>
#include <soc/sor.h>
#include <stdlib.h>
#include <string.h>
#include "chip.h"
enum {
DP_LT_SUCCESS = 0,

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@ -21,7 +21,7 @@
#include <arch/hlt.h>
#include <arch/io.h>
#include <console/console.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/clk_rst.h>
#include <stdint.h>
#include <stdlib.h>

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@ -21,10 +21,9 @@
#define __SOC_NVIDIA_TEGRA124_GPIO_H__
#include <soc/nvidia/tegra/gpio.h>
#include <soc/pinmux.h> /* for pinmux constants in GPIO macro */
#include <stdint.h>
#include "pinmux.h" /* for pinmux constants in GPIO macro */
/* GPIO index constants. */
#define GPIO_PORT_CONSTANTS(port) \

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@ -20,7 +20,7 @@
#ifndef __SOC_NVIDIA_TEGRA124_SDRAM_H__
#define __SOC_NVIDIA_TEGRA124_SDRAM_H__
#include "sdram_param.h"
#include <soc/sdram_param.h>
uint32_t sdram_get_ram_code(void);
void sdram_init(const struct sdram_params *param);

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@ -18,10 +18,9 @@
#define __NVIDIA_TEGRA124_SPI_H__
#include <spi-generic.h>
#include <soc/dma.h>
#include <stddef.h>
#include "dma.h"
struct tegra_spi_regs {
u32 command1; /* 0x000: SPI_COMMAND1 */
u32 command2; /* 0x004: SPI_COMMAND2 */

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@ -22,10 +22,9 @@
#include <console/console.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include "pmc.h"
#include "power.h"
#include "flow.h"
#include <soc/flow.h>
#include <soc/pmc.h>
#include <soc/power.h>
static struct tegra_pmc_regs * const pmc = (void *)TEGRA_PMC_BASE;
static struct flow_ctlr * const flow = (void *)TEGRA_FLOW_BASE;

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@ -22,13 +22,13 @@
#include <delay.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/emc.h>
#include <soc/mc.h>
#include <soc/pmc.h>
#include <soc/sdram.h>
#include <stdlib.h>
#include <symbols.h>
#include "emc.h"
#include "mc.h"
#include "pmc.h"
#include "sdram.h"
static void sdram_patch(uintptr_t addr, uint32_t value)
{

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@ -17,12 +17,11 @@
#include <arch/cache.h>
#include <console/console.h>
#include <stdlib.h>
#include <soc/addressmap.h>
#include "clk_rst.h"
#include "pmc.h"
#include "sdram.h"
#include <soc/clk_rst.h>
#include <soc/pmc.h>
#include <soc/sdram.h>
#include <stdlib.h>
/*
* This function reads SDRAM parameters (and a few CLK_RST regsiter values) from

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@ -19,16 +19,17 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <arch/io.h>
#include <soc/nvidia/tegra/dc.h>
#include <soc/nvidia/tegra124/sdram.h>
#include "chip.h"
#include <soc/display.h>
#include <soc/sdram.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "chip.h"
/* this sucks, but for now, fb size/location are hardcoded.
* Will break if we get 2. Sigh.
* We assume it's all multiples of MiB for MMUs sake.

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@ -14,26 +14,26 @@
*
*/
#include <console/console.h>
#include <arch/io.h>
#include <stdint.h>
#include <lib.h>
#include <stdlib.h>
#include <delay.h>
#include <soc/addressmap.h>
#include <device/device.h>
#include <stdlib.h>
#include <string.h>
#include <cpu/cpu.h>
#include <boot/tables.h>
#include <cbmem.h>
#include <soc/nvidia/tegra/dc.h>
#include "sor.h"
#include <soc/nvidia/tegra/displayport.h>
#include "clk_rst.h"
#include <console/console.h>
#include <cpu/cpu.h>
#include <delay.h>
#include <lib.h>
#include <device/device.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include "chip.h"
#include <soc/display.h>
#include <soc/nvidia/tegra/dc.h>
#include <soc/nvidia/tegra/displayport.h>
#include <soc/sor.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include "chip.h"
#define DEBUG_SOR 0

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@ -18,23 +18,23 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/cache.h>
#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
#include <cbfs.h>
#include <delay.h>
#include <inttypes.h>
#include <soc/addressmap.h>
#include <soc/dma.h>
#include <soc/spi.h>
#include <spi-generic.h>
#include <spi_flash.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <timer.h>
#include <arch/cache.h>
#include <arch/io.h>
#include <console/console.h>
#include <soc/addressmap.h>
#include <delay.h>
#include "dma.h"
#include "spi.h"
#if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI
# define DEBUG_SPI(x,...) printk(BIOS_DEBUG, "TEGRA_SPI: " x)

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@ -17,10 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/uart.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <console/console.h> /* for __console definition */
#include <console/uart.h>
#include <drivers/uart/uart8250reg.h>

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@ -20,8 +20,8 @@
#include <arch/cache.h>
#include <arch/exception.h>
#include <console/console.h>
#include <soc/nvidia/tegra124/cache.h>
#include <soc/nvidia/tegra124/early_configs.h>
#include <soc/cache.h>
#include <soc/early_configs.h>
#include <stdlib.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>