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riscv: Enable the newfangled way of selecting instruction sets 

gcc12+ will require riscv architecture selection to come not only with
featurei suffixd charactersa, it also comes with feature_ful suffix_ed
words_mith. Much creative, very appreciate.

To accommodate for this madness, enable the already existing (but off by
default) support for that in our gcc11 build, support using by detecting
the compiler's behavior in xcompile and pass that knowledge along to our
build system.

Then cross our fingers and hope for the best!

Change-Id: I5dfeed766626e78d4f8378d9d857b7a4d61510fd
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Patrick Georgi 2022-09-08 20:25:46 +02:00
parent 2c38933a0e
commit f0d5f67e46
3 changed files with 22 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/arch/riscv/Makefile.inc
View File

@ -21,19 +21,25 @@ $(error "You need to select ARCH_RISCV_RV64 or ARCH_RISCV_RV32")
endif endif
endif endif
# Needed for -print-libgcc-file-name which gets confused about all those arch
# suffixes in ARCH_SUFFIX_riscv.
simple_riscv_flags = $(riscv_flags)
ifeq ($(CCC_ANALYZER_OUTPUT_FORMAT),) ifeq ($(CCC_ANALYZER_OUTPUT_FORMAT),)
riscv_flags += -march=$(CONFIG_RISCV_ARCH) -mabi=$(CONFIG_RISCV_ABI) -mcmodel=$(CONFIG_RISCV_CODEMODEL) riscv_flags += -march=$(CONFIG_RISCV_ARCH)$(ARCH_SUFFIX_riscv) -mabi=$(CONFIG_RISCV_ABI) -mcmodel=$(CONFIG_RISCV_CODEMODEL)
simple_riscv_flags += -march=$(CONFIG_RISCV_ARCH) -mabi=$(CONFIG_RISCV_ABI) -mcmodel=$(CONFIG_RISCV_CODEMODEL)
else else
riscv_flags += $(_rv_flags) riscv_flags += $(_rv_flags)
simple_riscv_flags += $(_rv_flags)
endif endif
riscv_asm_flags = -march=$(CONFIG_RISCV_ARCH) -mabi=$(CONFIG_RISCV_ABI) riscv_asm_flags = -march=$(CONFIG_RISCV_ARCH)$(ARCH_SUFFIX_riscv) -mabi=$(CONFIG_RISCV_ABI)
COMPILER_RT_bootblock = $(shell $(GCC_bootblock) $(riscv_flags) -print-libgcc-file-name) COMPILER_RT_bootblock = $(shell $(GCC_bootblock) $(simple_riscv_flags) -print-libgcc-file-name)
COMPILER_RT_romstage = $(shell $(GCC_romstage) $(riscv_flags) -print-libgcc-file-name) COMPILER_RT_romstage = $(shell $(GCC_romstage) $(simple_riscv_flags) -print-libgcc-file-name)
COMPILER_RT_ramstage = $(shell $(GCC_ramstage) $(riscv_flags) -print-libgcc-file-name) COMPILER_RT_ramstage = $(shell $(GCC_ramstage) $(simple_riscv_flags) -print-libgcc-file-name)
################################################################################ ################################################################################
## bootblock ## bootblock

6
util/crossgcc/buildgcc
View File

@ -681,11 +681,13 @@ build_BINUTILS() {
if [ $TARGETARCH = "x86_64-elf" ]; then if [ $TARGETARCH = "x86_64-elf" ]; then
ADDITIONALTARGET=",i386-elf" ADDITIONALTARGET=",i386-elf"
fi fi
# shellcheck disable=SC2086
CC="$(hostcc target)" CXX="$(hostcxx target)" \ CC="$(hostcc target)" CXX="$(hostcxx target)" \
../binutils-${BINUTILS_VERSION}/configure --prefix="$TARGETDIR" \ ../binutils-${BINUTILS_VERSION}/configure --prefix="$TARGETDIR" \
--target=${TARGETARCH} --enable-targets=${TARGETARCH}${ADDITIONALTARGET} \ --target=${TARGETARCH} --enable-targets=${TARGETARCH}${ADDITIONALTARGET} \
--disable-werror --disable-nls --enable-lto \ --disable-werror --disable-nls --enable-lto \
--enable-gold --enable-multilib \ --enable-gold --enable-multilib \
${BINUTILS_OPTIONS} \
CFLAGS="$HOSTCFLAGS" \ CFLAGS="$HOSTCFLAGS" \
CXXFLAGS="$HOSTCFLAGS" \ CXXFLAGS="$HOSTCFLAGS" \
|| touch .failed || touch .failed
@ -932,7 +934,9 @@ case "$TARGETARCH" in
x86_64*) TARGETARCH=x86_64-elf;; x86_64*) TARGETARCH=x86_64-elf;;
i386-elf) ;; i386-elf) ;;
i386-mingw32) ;; i386-mingw32) ;;
riscv-elf) TARGETARCH=riscv64-elf;; riscv-elf) TARGETARCH=riscv64-elf
GCC_OPTIONS="$GCC_OPTIONS --with-isa-spec=20191213"
BINUTILS_OPTIONS="$BINUTILS_OPTIONS --with-isa-spec=20191213";;
powerpc64*-linux*) ;; powerpc64*-linux*) ;;
i386*) TARGETARCH=i386-elf;; i386*) TARGETARCH=i386-elf;;
arm*) TARGETARCH=arm-eabi;; arm*) TARGETARCH=arm-eabi;;

6
util/xcompile/xcompile
View File

@ -202,6 +202,10 @@ detect_special_flags() {
"$LDFLAGS --fix-cortex-a53-843419" && \ "$LDFLAGS --fix-cortex-a53-843419" && \
LDFLAGS_ARM64_A53_ERRATUM_843419+=" --fix-cortex-a53-843419" LDFLAGS_ARM64_A53_ERRATUM_843419+=" --fix-cortex-a53-843419"
;; ;;
riscv)
testcc "$GCC" "$FLAGS_GCC -march=rv64iadc_zicsr_zifencei" &&
ARCH_SUFFIX="_zicsr_zifencei"
;;
esac esac
} }
@ -221,6 +225,7 @@ report_arch_toolchain() {
# elf${TWIDTH}-${TBFDARCH} toolchain (${GCC}) # elf${TWIDTH}-${TBFDARCH} toolchain (${GCC})
ARCH_SUPPORTED+=${TARCH} ARCH_SUPPORTED+=${TARCH}
SUBARCH_SUPPORTED+=${TSUPP-${TARCH}} SUBARCH_SUPPORTED+=${TSUPP-${TARCH}}
ARCH_SUFFIX_${TARCH}:=${ARCH_SUFFIX}
# GCC # GCC
GCC_CC_${TARCH}:=${GCC} GCC_CC_${TARCH}:=${GCC}
@ -399,6 +404,7 @@ test_architecture() {
unset TABI TARCH TBFDARCH TCLIST TENDIAN TSUPP TWIDTH unset TABI TARCH TBFDARCH TCLIST TENDIAN TSUPP TWIDTH
unset CC_RT_EXTRA_GCC CC_RT_EXTRA_CLANG unset CC_RT_EXTRA_GCC CC_RT_EXTRA_CLANG
unset GCC CLANG unset GCC CLANG
unset ARCH_SUFFIX
if type "arch_config_$architecture" > /dev/null; then if type "arch_config_$architecture" > /dev/null; then
"arch_config_$architecture" "arch_config_$architecture"
else else