amd/stoneyridge: Set BERT region size when no TSEG used
Expand the BERT reserved region size setting to account for the possibility of no TSEG configuration. This change is only for completeness, as stoneyridge must always use TSEG. Change-Id: I90753fa408cfac4de38aff08979c45349bb62a66 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/28554 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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@ -38,10 +38,14 @@ uintptr_t restore_top_of_low_cacheable(void)
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}
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#if IS_ENABLED(CONFIG_ACPI_BERT)
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/* SMM_TSEG_SIZE must stay on a boundary appropriate for its granularity */
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#define BERT_REGION_MAX_SIZE CONFIG_SMM_TSEG_SIZE
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#if CONFIG_SMM_TSEG_SIZE == 0x0
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#define BERT_REGION_MAX_SIZE 0x100000
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#else
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/* SMM_TSEG_SIZE must stay on a boundary appropriate for its granularity */
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#define BERT_REGION_MAX_SIZE CONFIG_SMM_TSEG_SIZE
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#endif
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#else
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#define BERT_REGION_MAX_SIZE 0
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#define BERT_REGION_MAX_SIZE 0
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#endif
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void bert_reserved_region(void **start, size_t *size)
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