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fix VIA C7 code. 

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-10-01 12:24:57 +00:00 committed by Stefan Reinauer
parent 6c05bf4114
commit f11b81d18d
1 changed files with 4 additions and 2 deletions
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6
src/cpu/via/car/cache_as_ram.inc
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@ -100,7 +100,8 @@ clear_fixed_var_mtrr_out:
*/ */
movl $MTRRphysBase_MSR(1), %ecx movl $MTRRphysBase_MSR(1), %ecx
xorl %edx, %edx xorl %edx, %edx
movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr wrmsr
movl $MTRRphysMask_MSR(1), %ecx movl $MTRRphysMask_MSR(1), %ecx
@ -243,7 +244,8 @@ testok:
/* Cache XIP_ROM_BASE-SIZE to speedup coreboot code. */ /* Cache XIP_ROM_BASE-SIZE to speedup coreboot code. */
movl $MTRRphysBase_MSR(3), %ecx movl $MTRRphysBase_MSR(3), %ecx
xorl %edx, %edx xorl %edx, %edx
movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr wrmsr
movl $MTRRphysMask_MSR(3), %ecx movl $MTRRphysMask_MSR(3), %ecx