mb/google/eve: Add power controls to touchscreen device

Instead of having the SMI handler power off the touchscreen on the
way into suspend add power resource controls to the ACPI device so
the power is managed by the kernel instead of the BIOS.

BUG=b:35581264
TEST=manual testing on Eve to ensure that the touchscreen is still
functional at boot and after suspend/resume, and that it does not
draw power in suspend.

Change-Id: Id9a98807d24bbc7dff32408f3d113f6fad5bc023
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/19946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2017-05-26 15:47:57 -07:00
parent cd6b22f9a0
commit f124b88cfb
3 changed files with 5 additions and 3 deletions

View File

@ -233,6 +233,10 @@ chip soc/intel/skylake
register "generic.desc" = ""WCOM Digitizer"" register "generic.desc" = ""WCOM Digitizer""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
register "generic.speed" = "I2C_SPEED_FAST_PLUS" register "generic.speed" = "I2C_SPEED_FAST_PLUS"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
register "generic.enable_delay_ms" = "250"
register "hid_desc_reg_offset" = "0x1" register "hid_desc_reg_offset" = "0x1"
device i2c 0a on end device i2c 0a on end
end end

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@ -38,7 +38,6 @@
#define EC_SCI_GPI GPE0_ESPI #define EC_SCI_GPI GPE0_ESPI
/* Power rail control signals */ /* Power rail control signals */
#define EN_PP3300_DX_TOUCH GPP_C22
#define EN_PP3300_DX_CAM GPP_D12 #define EN_PP3300_DX_CAM GPP_D12
#ifndef __ACPI__ #ifndef __ACPI__
@ -117,7 +116,7 @@ static const struct pad_config gpio_table[] = {
/* I2C1_SCL */ PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* TPM */ /* I2C1_SCL */ PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* TPM */
/* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* SERVO */ /* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* SERVO */
/* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */ /* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */
/* UART2_RTS# */ PAD_CFG_GPO(GPP_C22, 1, DEEP), /* EN_PP3300_DX_TOUCHSCREEN */ /* UART2_RTS# */ PAD_CFG_GPO(GPP_C22, 0, DEEP), /* EN_PP3300_DX_TOUCHSCREEN */
/* UART2_CTS# */ PAD_CFG_GPI(GPP_C23, 20K_PU, DEEP), /* PCH_WP */ /* UART2_CTS# */ PAD_CFG_GPI(GPP_C23, 20K_PU, DEEP), /* PCH_WP */
/* SPI1_CS# */ PAD_CFG_GPO(GPP_D0, 0, DEEP), /* TOUCHPAD_BOOT */ /* SPI1_CS# */ PAD_CFG_GPO(GPP_D0, 0, DEEP), /* TOUCHPAD_BOOT */

View File

@ -29,7 +29,6 @@ void mainboard_smi_espi_handler(void)
static void mainboard_gpio_smi_sleep(u8 slp_typ) static void mainboard_gpio_smi_sleep(u8 slp_typ)
{ {
/* Power down the rails on any sleep type */ /* Power down the rails on any sleep type */
gpio_set(EN_PP3300_DX_TOUCH, 0);
gpio_set(EN_PP3300_DX_CAM, 0); gpio_set(EN_PP3300_DX_CAM, 0);
} }