exynos5420: Simplify the graphics code by eliminating the unused color map
The code that allocated space for the framebuffer was adding space for a vestigial color map which was never used. It was also passing around a structure which was used to calculate a single value which was already known when that structure was put together. Eliminate the extra space, and pass the single value instead of the structure. Change-Id: I29bc17488539dbe695908e47f0b80c07e102e17d Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/3666 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -68,12 +68,10 @@ static void exynos_displayport_init(device_t dev)
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/* put these on the stack. If, at some point, we want to move
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* this code to a pre-ram stage, it will be much easier.
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*/
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vidinfo_t vi;
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struct exynos5_fimd_panel panel;
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unsigned long int fb_size;
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u32 lcdbase;
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memset(&vi, 0, sizeof(vi));
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memset(&panel, 0, sizeof(panel));
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panel.is_dp = 1; /* Display I/F is eDP */
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@ -94,18 +92,10 @@ static void exynos_displayport_init(device_t dev)
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panel.xres = conf->xres;
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panel.yres = conf->yres;
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vi.vl_col = conf->xres;
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vi.vl_row = conf->yres;
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vi.vl_bpix = conf->bpp;
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/*
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* The size is a magic number from hardware. Allocate enough for the
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* frame buffer and color map.
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*/
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/* The size is a magic number from hardware. */
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fb_size = conf->xres * conf->yres * (conf->bpp / 8);
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lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size + 64*KiB);
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printk(BIOS_SPEW, "LCD colormap base is %p\n", (void *)(lcdbase));
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mmio_resource(dev, 0, lcdbase/KiB, 64);
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vi.cmap = (void *)lcdbase;
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lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size);
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printk(BIOS_SPEW, "LCD framebuffer base is %p\n", (void *)(lcdbase));
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/*
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* We need to clean and invalidate the framebuffer region and disable
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@ -119,18 +109,17 @@ static void exynos_displayport_init(device_t dev)
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* FIXME: Is disabling/re-enabling the MMU entirely necessary?
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*/
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uint32_t lower = ALIGN_DOWN(lcdbase, MiB);
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uint32_t upper = ALIGN_UP(lcdbase + fb_size + 64*KiB, MiB);
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uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB);
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dcache_clean_invalidate_by_mva(lower, upper - lower);
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dcache_mmu_disable();
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mmu_config_range(lower/MiB, (upper - lower)/MiB, DCACHE_OFF);
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dcache_mmu_enable();
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lcdbase += 64*KiB;
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mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB);
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printk(BIOS_DEBUG,
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"Initializing Exynos VGA, base %p\n", (void *)lcdbase);
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memset((void *)lcdbase, 0, fb_size); /* clear the framebuffer */
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ret = lcd_ctrl_init(&vi, &panel, (void *)lcdbase);
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ret = lcd_ctrl_init(fb_size, &panel, (void *)lcdbase);
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}
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static void cpu_init(device_t dev)
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@ -117,14 +117,6 @@ struct s5p_dp_device {
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struct link_train link_train;
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};
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/* this struct is used by mainboards to pass mode info to the driver */
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typedef struct vidinfo {
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u16 vl_col;
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u16 vl_row;
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u8 vl_bpix;
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u16 *cmap;
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} vidinfo_t;
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/* s5p_dp_reg.c */
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/*
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@ -260,9 +252,9 @@ void s5p_dp_wait_hw_link_training_done(struct s5p_dp_device *dp);
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/* startup and init */
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struct exynos5_fimd_panel;
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void fb_init(vidinfo_t *panel_info, void *lcdbase,
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void fb_init(unsigned long int fb_size, void *lcdbase,
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struct exynos5_fimd_panel *pd);
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int dp_controller_init(struct s5p_dp_device *dp_device);
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int lcd_ctrl_init(vidinfo_t *panel_info,
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int lcd_ctrl_init(unsigned long int fb_size,
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struct exynos5_fimd_panel *panel_data, void *lcdbase);
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#endif /* CPU_SAMSUNG_EXYNOS5420_DP_CORE_H */
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@ -116,32 +116,21 @@ static void fimd_bypass(void)
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sysreg->disp1blk_cfg &= ~FIMDBYPASS_DISP1;
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}
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/* Calculate the size of Framebuffer from the resolution */
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static u32 calc_fbsize(vidinfo_t *panel_info)
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{
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/* They had PAGE_SIZE here instead of 4096.
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* but that's a totally arbitrary number -- everything nowadays
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* has lots of page sizes.
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* So keep it obvious.
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*/
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return ALIGN((panel_info->vl_col * panel_info->vl_row *
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((1<<panel_info->vl_bpix) / 8)), 4096);
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}
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/*
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* Initialize display controller.
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*
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* @param lcdbase pointer to the base address of framebuffer.
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* @pd pointer to the main panel_data structure
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*/
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void fb_init(vidinfo_t *panel_info, void *lcdbase,
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void fb_init(unsigned long int fb_size, void *lcdbase,
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struct exynos5_fimd_panel *pd)
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{
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unsigned int val;
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u32 fbsize;
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struct exynos5_fimd *fimd = samsung_get_base_fimd();
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struct exynos5_disp_ctrl *disp_ctrl = samsung_get_base_disp_ctrl();
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fb_size = ALIGN(fb_size, 4096);
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writel(pd->ivclk | pd->fixvclk, &disp_ctrl->vidcon1);
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val = ENVID_ON | ENVID_F_ON | (pd->clkval_f << CLKVAL_F_OFFSET);
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writel(val, &fimd->vidcon0);
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@ -161,9 +150,7 @@ void fb_init(vidinfo_t *panel_info, void *lcdbase,
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writel(val, &disp_ctrl->vidtcon2);
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writel((unsigned int)lcdbase, &fimd->vidw00add0b0);
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fbsize = calc_fbsize(panel_info);
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writel((unsigned int)lcdbase + fbsize, &fimd->vidw00add1b0);
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writel((unsigned int)lcdbase + fb_size, &fimd->vidw00add1b0);
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writel(pd->xres * 2, &fimd->vidw00add2);
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@ -586,12 +573,12 @@ int dp_controller_init(struct s5p_dp_device *dp_device)
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* @param lcdbase Base address of LCD frame buffer
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* @return 0 if ok, -ve error code on error
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*/
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int lcd_ctrl_init(vidinfo_t *panel_info,
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int lcd_ctrl_init(unsigned long int fb_size,
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struct exynos5_fimd_panel *panel_data, void *lcdbase)
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{
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int ret = 0;
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fimd_bypass();
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fb_init(panel_info, lcdbase, panel_data);
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fb_init(fb_size, lcdbase, panel_data);
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return ret;
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}
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@ -198,7 +198,7 @@ static void mainboard_init(device_t dev)
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disable_usb30_pll();
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fb_addr = cbmem_find(CBMEM_ID_CONSOLE);
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set_vbe_mode_info_valid(&edid, (uintptr_t)(fb_addr) + 64*KiB);
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set_vbe_mode_info_valid(&edid, (uintptr_t)fb_addr);
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lcd_vdd();
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do {
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