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coreboot-kgpe-d16
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Speed up coreboot_ram loading by moving the decompression stack 

into the cached area. Back to 469ms until coreboot_ram is actually
running on epia-cn

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5417 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-04-13 10:01:14 +00:00 committed by Stefan Reinauer
parent 4d68df779f
commit f17ca16624
2 changed files with 18 additions and 8 deletions
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12
src/arch/i386/init/crt0_romcc_epilogue.inc
View File

@ -14,8 +14,16 @@ __main:
movl %ebp, %esi
/* FIXME: look for a proper place for the stack */
movl $0x4000000, %esp
/* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This
* makes sure that we stay completely within the 1M-64K of memory that we
* preserve for suspend/resume.
*/
#ifndef HIGH_MEMORY_SAVE
#warning Need a central place for HIGH_MEMORY_SAVE
#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 )
#endif
movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp
movl %esp, %ebp
pushl %esi
call copy_and_run

14
src/cpu/via/car/cache_as_ram.inc
View File

@ -270,14 +270,16 @@ __main:
movl %ebp, %esi
/* FIXME: These values might have to change for suspend-to-ram.
* the 0x00400000 was chosen as this is a place in memory that
* should exist in all contemporary configurations (ie. large
* enough RAM), but doesn't collide with anything coreboot does.
* Other than that, it's arbitrary.
/* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This
* makes sure that we stay completely within the 1M-64K of memory that we
* preserve for suspend/resume.
*/
movl $0x4000000, %esp
#ifndef HIGH_MEMORY_SAVE
#warning Need a central place for HIGH_MEMORY_SAVE
#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 )
#endif
movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp
movl %esp, %ebp
pushl %esi
call copy_and_run