soc/mediatek/mt8188: Fix indention in pll.c
BUG=b:233720142 TEST=build pass. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Change-Id: I567d1ded1c3b5e36a25026cec697d43d92d5524c Reviewed-on: https://review.coreboot.org/c/coreboot/+/67546 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -292,7 +292,7 @@ static const struct mux_sel mux_sels[] = {
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{ .id = TOP_AUD_INTBUS_SEL, .sel = 1 }, /* 1: mainpll_d4_d4 */
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{ .id = TOP_AUD_INTBUS_SEL, .sel = 1 }, /* 1: mainpll_d4_d4 */
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/* CLK_CFG_8 */
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/* CLK_CFG_8 */
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{ .id = TOP_AUDIO_H_SEL, .sel = 2 }, /* 2: apll1_ck */
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{ .id = TOP_AUDIO_H_SEL, .sel = 2 }, /* 2: apll1_ck */
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{ .id = TOP_PWRAP_ULPOSC_SEL, .sel = 1 }, /* 1: ulposc_d10 */
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{ .id = TOP_PWRAP_ULPOSC_SEL, .sel = 1 }, /* 1: ulposc_d10 */
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{ .id = TOP_ATB_SEL, .sel = 1 }, /* 1: mainpll_d4_d2 */
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{ .id = TOP_ATB_SEL, .sel = 1 }, /* 1: mainpll_d4_d2 */
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{ .id = TOP_SSPM_SEL, .sel = 3 }, /* 3: mainpll_d5_d2 */
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{ .id = TOP_SSPM_SEL, .sel = 3 }, /* 3: mainpll_d5_d2 */
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/* CLK_CFG_9 */
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/* CLK_CFG_9 */
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