superio/serverengines/pilot: Avoid .c includes

Following the same reasoning as commit
d3043313a9 superio/fintek/f81865f: Avoid
.c includes
Clean up the early_serial #include directives in mainboard/romstage code.

Change-Id: Ia6ed36c8517a95b651fefdd855eec0ec91d73187
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5439
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Edward O'Callaghan 2014-03-31 21:53:32 +11:00 committed by Patrick Georgi
parent 618de689c3
commit f18abab200
10 changed files with 68 additions and 11 deletions

View File

@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_AMD_AMDK8
select SOUTHBRIDGE_BROADCOM_BCM21000
select SOUTHBRIDGE_BROADCOM_BCM5785
select SUPERIO_SERVERENGINES_PILOT
select SUPERIO_NSC_PC87417
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE

View File

@ -40,8 +40,7 @@
#include "lib/delay.c"
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
#include "superio/serverengines/pilot/early_serial.c"
#include "superio/serverengines/pilot/early_init.c"
#include <superio/serverengines/pilot/pilot.h>
#include "superio/nsc/pc87417/early_serial.c"
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/debug.c"

View File

@ -6,6 +6,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_AMD_AMDFAM10
select SOUTHBRIDGE_BROADCOM_BCM21000
select SOUTHBRIDGE_BROADCOM_BCM5785
select SUPERIO_SERVERENGINES_PILOT
select SUPERIO_NSC_PC87417
select DIMM_DDR2
select DIMM_REGISTERED

View File

@ -46,8 +46,7 @@
#include "lib/delay.c"
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdfam10/reset_test.c"
#include "superio/serverengines/pilot/early_serial.c"
#include "superio/serverengines/pilot/early_init.c"
#include <superio/serverengines/pilot/pilot.h>
#include "superio/nsc/pc87417/early_serial.c"
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdfam10/debug.c"

View File

@ -23,7 +23,7 @@ subdirs-y += ite
subdirs-y += nsc
subdirs-y += nuvoton
subdirs-y += renesas
#subdirs-y += serverengines
subdirs-y += serverengines
subdirs-y += smsc
subdirs-y += via
subdirs-y += winbond

View File

@ -0,0 +1,20 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
subdirs-y += pilot

View File

@ -0,0 +1,22 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
romstage-$(CONFIG_SUPERIO_SERVERENGINES_PILOT) += early_init.c
romstage-$(CONFIG_SUPERIO_SERVERENGINES_PILOT) += early_serial.c

View File

@ -23,11 +23,16 @@
#define BLUBB_DEV PNP_DEV(port, 0x04)
#include <arch/io.h>
#include <console/console.h>
#include <device/pnp.h>
#include "pilot.h"
/*
* Logical device 4, 5 and 7 are being deactivated. Logical Device 1 seems to
* be another serial (?), it is also deactivated on the HP machine.
*/
static void pilot_early_init(device_t dev)
void pilot_early_init(device_t dev)
{
u16 port = dev >> 8;

View File

@ -22,23 +22,24 @@
/* PILOT Super I/O is only based on LPC observation done on factory system. */
#include <arch/io.h>
#include <device/pnp.h>
#include "pilot.h"
/* Pilot uses 0x5A/0xA5 pattern to actiavte deactivate config access. */
static void pnp_enter_ext_func_mode(device_t dev)
void pnp_enter_ext_func_mode(device_t dev)
{
u16 port = dev >> 8;
outb(0x5A, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
void pnp_exit_ext_func_mode(device_t dev)
{
u16 port = dev >> 8;
outb(0xA5, port);
}
/* Serial config is a fairly standard procedure. */
static void __attribute__((unused)) pilot_enable_serial(device_t dev, u16 iobase)
void pilot_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
@ -47,7 +48,7 @@ static void __attribute__((unused)) pilot_enable_serial(device_t dev, u16 iobase
pnp_exit_ext_func_mode(dev);
}
static void __attribute__((unused)) pilot_disable_serial(device_t dev)
void pilot_disable_serial(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);

View File

@ -30,4 +30,13 @@
#define PILOT_LD5 0x05 /* Logical device 5 */
#define PILOT_LD7 0x07 /* Logical device 7 */
#endif
/* should not expose these however early_init needs love */
void pnp_enter_ext_func_mode(device_t dev);
void pnp_exit_ext_func_mode(device_t dev);
void pilot_early_init(device_t dev);
void pilot_enable_serial(device_t dev, u16 iobase);
void pilot_disable_serial(device_t dev);
#endif /* SUPERIO_SERVERENGINES_PILOT_PILOT_H */