superio/serverengines/pilot: Avoid .c includes
Following the same reasoning as commit
d3043313a9
superio/fintek/f81865f: Avoid
.c includes
Clean up the early_serial #include directives in mainboard/romstage code.
Change-Id: Ia6ed36c8517a95b651fefdd855eec0ec91d73187
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5439
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
parent
618de689c3
commit
f18abab200
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@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select NORTHBRIDGE_AMD_AMDK8
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select SOUTHBRIDGE_BROADCOM_BCM21000
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select SOUTHBRIDGE_BROADCOM_BCM5785
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select SUPERIO_SERVERENGINES_PILOT
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select SUPERIO_NSC_PC87417
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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@ -40,8 +40,7 @@
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#include "lib/delay.c"
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#include "cpu/x86/lapic.h"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "superio/serverengines/pilot/early_serial.c"
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#include "superio/serverengines/pilot/early_init.c"
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#include <superio/serverengines/pilot/pilot.h>
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#include "superio/nsc/pc87417/early_serial.c"
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#include "cpu/x86/bist.h"
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#include "northbridge/amd/amdk8/debug.c"
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@ -6,6 +6,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select NORTHBRIDGE_AMD_AMDFAM10
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select SOUTHBRIDGE_BROADCOM_BCM21000
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select SOUTHBRIDGE_BROADCOM_BCM5785
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select SUPERIO_SERVERENGINES_PILOT
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select SUPERIO_NSC_PC87417
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select DIMM_DDR2
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select DIMM_REGISTERED
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@ -46,8 +46,7 @@
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#include "lib/delay.c"
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#include "cpu/x86/lapic.h"
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#include "northbridge/amd/amdfam10/reset_test.c"
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#include "superio/serverengines/pilot/early_serial.c"
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#include "superio/serverengines/pilot/early_init.c"
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#include <superio/serverengines/pilot/pilot.h>
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#include "superio/nsc/pc87417/early_serial.c"
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#include "cpu/x86/bist.h"
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#include "northbridge/amd/amdfam10/debug.c"
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@ -23,7 +23,7 @@ subdirs-y += ite
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subdirs-y += nsc
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subdirs-y += nuvoton
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subdirs-y += renesas
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#subdirs-y += serverengines
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subdirs-y += serverengines
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subdirs-y += smsc
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subdirs-y += via
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subdirs-y += winbond
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@ -0,0 +1,20 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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subdirs-y += pilot
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@ -0,0 +1,22 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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romstage-$(CONFIG_SUPERIO_SERVERENGINES_PILOT) += early_init.c
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romstage-$(CONFIG_SUPERIO_SERVERENGINES_PILOT) += early_serial.c
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@ -23,11 +23,16 @@
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#define BLUBB_DEV PNP_DEV(port, 0x04)
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/pnp.h>
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#include "pilot.h"
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/*
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* Logical device 4, 5 and 7 are being deactivated. Logical Device 1 seems to
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* be another serial (?), it is also deactivated on the HP machine.
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*/
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static void pilot_early_init(device_t dev)
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void pilot_early_init(device_t dev)
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{
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u16 port = dev >> 8;
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@ -22,23 +22,24 @@
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/* PILOT Super I/O is only based on LPC observation done on factory system. */
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#include <arch/io.h>
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#include <device/pnp.h>
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#include "pilot.h"
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/* Pilot uses 0x5A/0xA5 pattern to actiavte deactivate config access. */
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static void pnp_enter_ext_func_mode(device_t dev)
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void pnp_enter_ext_func_mode(device_t dev)
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{
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u16 port = dev >> 8;
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outb(0x5A, port);
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}
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static void pnp_exit_ext_func_mode(device_t dev)
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void pnp_exit_ext_func_mode(device_t dev)
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{
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u16 port = dev >> 8;
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outb(0xA5, port);
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}
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/* Serial config is a fairly standard procedure. */
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static void __attribute__((unused)) pilot_enable_serial(device_t dev, u16 iobase)
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void pilot_enable_serial(device_t dev, u16 iobase)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_set_logical_device(dev);
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@ -47,7 +48,7 @@ static void __attribute__((unused)) pilot_enable_serial(device_t dev, u16 iobase
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pnp_exit_ext_func_mode(dev);
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}
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static void __attribute__((unused)) pilot_disable_serial(device_t dev)
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void pilot_disable_serial(device_t dev)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_set_logical_device(dev);
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@ -30,4 +30,13 @@
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#define PILOT_LD5 0x05 /* Logical device 5 */
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#define PILOT_LD7 0x07 /* Logical device 7 */
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#endif
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/* should not expose these however early_init needs love */
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void pnp_enter_ext_func_mode(device_t dev);
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void pnp_exit_ext_func_mode(device_t dev);
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void pilot_early_init(device_t dev);
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void pilot_enable_serial(device_t dev, u16 iobase);
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void pilot_disable_serial(device_t dev);
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#endif /* SUPERIO_SERVERENGINES_PILOT_PILOT_H */
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