From f1bb19abee7a81d5463c5885b57fe2cbc5d21715 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 4 May 2014 17:23:49 +0300 Subject: [PATCH] AGESA fam14: Comment lack of PCI-e slot resets MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These boards return with AGESA_UNSUPPORTED, while other boards return AGESA_SUCCESS here when there is no hardware for external reset signalling. Change-Id: I5aed211b1812888af55a691cfbfa8d7b5aff91bc Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/5679 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Edward O'Callaghan Reviewed-by: Patrick Georgi --- src/mainboard/asrock/e350m1/BiosCallOuts.c | 14 +++++++------- .../lippert/frontrunner-af/BiosCallOuts.c | 14 ++++++-------- src/mainboard/lippert/toucan-af/BiosCallOuts.c | 16 +++++++--------- 3 files changed, 20 insertions(+), 24 deletions(-) diff --git a/src/mainboard/asrock/e350m1/BiosCallOuts.c b/src/mainboard/asrock/e350m1/BiosCallOuts.c index 8b78f8e03e..4437c4683d 100644 --- a/src/mainboard/asrock/e350m1/BiosCallOuts.c +++ b/src/mainboard/asrock/e350m1/BiosCallOuts.c @@ -24,6 +24,12 @@ #include "SB800.h" #include +/* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess? + * + * Board is known to have some issues with integrated NIC and + * might need implementation to drive some GPIOs. + */ + CONST BIOS_CALLOUT_STRUCT BiosCallouts[] = { {AGESA_ALLOCATE_BUFFER, BiosAllocateBuffer }, @@ -36,7 +42,7 @@ CONST BIOS_CALLOUT_STRUCT BiosCallouts[] = {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_DRAM_INIT, BiosHookBeforeDramInit }, {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, - {AGESA_GNB_PCIE_SLOT_RESET, BiosGnbPcieSlotReset }, + {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported }, }; AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr) @@ -145,9 +151,3 @@ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) MemData->ParameterListPtr->EnableMemClr = FALSE; return Status; } - -/* PCIE slot reset control */ -AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) -{ - return AGESA_UNSUPPORTED; -} diff --git a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c index eb58837923..3905d437c9 100644 --- a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c +++ b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c @@ -23,6 +23,11 @@ #include "heapManager.h" #include +/* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess? + * + * Dedicated reset is not needed for the on-board Intel I210 GbE controller. + */ + STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = { {AGESA_ALLOCATE_BUFFER, BiosAllocateBuffer }, @@ -32,7 +37,7 @@ STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = {AGESA_READ_SPD, BiosReadSpd }, {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, {AGESA_RUNFUNC_ONAP, BiosRunFuncOnAp }, - {AGESA_GNB_PCIE_SLOT_RESET, BiosGnbPcieSlotReset }, + {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported }, {AGESA_HOOKBEFORE_DRAM_INIT, BiosHookBeforeDramInit }, {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, @@ -85,10 +90,3 @@ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) return AGESA_SUCCESS; } - -/* PCIE slot reset control */ -AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) -{ - // Dedicated reset not needed for the on-board Intel I210 GbE controller. - return AGESA_UNSUPPORTED; -} diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/toucan-af/BiosCallOuts.c index 0f292c1a04..a9570bc29f 100644 --- a/src/mainboard/lippert/toucan-af/BiosCallOuts.c +++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.c @@ -23,6 +23,12 @@ #include "heapManager.h" #include +/* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess? + * + * COM Express doesn't provide dedicated resets for individual lanes + * and it's not needed for the on-board Intel I210 GbE controller. + */ + STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = { {AGESA_ALLOCATE_BUFFER, BiosAllocateBuffer }, @@ -32,7 +38,7 @@ STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = {AGESA_READ_SPD, BiosReadSpd }, {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, {AGESA_RUNFUNC_ONAP, BiosRunFuncOnAp }, - {AGESA_GNB_PCIE_SLOT_RESET, BiosGnbPcieSlotReset }, + {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported }, {AGESA_HOOKBEFORE_DRAM_INIT, BiosHookBeforeDramInit}, {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, @@ -85,11 +91,3 @@ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr) return AGESA_SUCCESS; } - -/* PCIE slot reset control */ -AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) -{ - // COM Express doesn't provide dedicated resets for individual lanes - // and it's not needed for the on-board Intel I210 GbE controller. - return AGESA_UNSUPPORTED; -}