mb/google/brya/variants/gimble: Update PL1 min value

Update PL1 minimum value from 3W to 12W as per the thermal design
discussed in this bug 203371203 comment #10.

BUG=b:203371203
BRANCH=None
TEST=Build and boot the gimble system

Change-Id: Id66cfb6f6dc0217bd4d83eae1d66ad867a1bdb46
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58650
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Sumeet Pawnikar 2021-10-27 16:42:10 +05:30 committed by Werner Zeh
parent a2610581a5
commit f1d0c828d7
1 changed files with 1 additions and 1 deletions

View File

@ -63,7 +63,7 @@ chip soc/intel/alderlake
}"
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.min_power = 12000,
.max_power = 15000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,