soc/intel/quark: use common Intel ACPI hardware definitions
Transition to using the common Intel ACPI hardware definitions generic ACPI definitions. BUG=chrome-os-partner:54977 Change-Id: I034c083604892a5fa25dff3b50e327e0a885b021 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15683 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
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@ -18,11 +18,7 @@
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#define _SOC_PM_H_
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#define _SOC_PM_H_
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#include <stdint.h>
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#include <stdint.h>
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#include <arch/acpi.h>
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/* Generic sleep state types */
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#define SLEEP_STATE_S0 0
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#define SLEEP_STATE_S3 3
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#define SLEEP_STATE_S5 5
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struct chipset_power_state {
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struct chipset_power_state {
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uint32_t prev_sleep_state;
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uint32_t prev_sleep_state;
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@ -117,7 +117,7 @@ struct chipset_power_state *fill_power_state(void)
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{
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{
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struct chipset_power_state *ps = car_get_var_ptr(&power_state);
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struct chipset_power_state *ps = car_get_var_ptr(&power_state);
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ps->prev_sleep_state = 0;
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ps->prev_sleep_state = ACPI_S0;
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printk(BIOS_DEBUG, "prev_sleep_state %d\n", ps->prev_sleep_state);
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printk(BIOS_DEBUG, "prev_sleep_state %d\n", ps->prev_sleep_state);
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return ps;
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return ps;
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}
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}
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@ -147,7 +147,7 @@ void soc_memory_init_params(struct romstage_params *params,
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hexdump((void *)0x000ffff0, 0x10);
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hexdump((void *)0x000ffff0, 0x10);
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/* Clear SMI and wake events */
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/* Clear SMI and wake events */
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if (ps->prev_sleep_state != 3) {
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if (ps->prev_sleep_state != ACPI_S3) {
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printk(BIOS_SPEW, "Clearing SMI interrupts and wake events\n");
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printk(BIOS_SPEW, "Clearing SMI interrupts and wake events\n");
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reg_script_run_on_dev(LPC_BDF, clear_smi_and_wake_events);
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reg_script_run_on_dev(LPC_BDF, clear_smi_and_wake_events);
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}
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}
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