diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 12942caddc..b5bcc65ebe 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -346,6 +346,8 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
 	params->SerialIrqConfigStartFramePulse = config->SerialIrqConfigStartFramePulse;
 
 	params->SkipMpInit = config->FspSkipMpInit;
+	memcpy(params->SerialIoI2cVoltage, config->SerialIoI2cVoltage,
+			sizeof(params->SerialIoI2cVoltage));
 
 	/*
 	 * To disable Heci, the Psf needs to be left unlocked
@@ -991,6 +993,24 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original,
 	fsp_display_upd_value("VrConfigEnable[4]", 1,
 		original->VrConfigEnable[4],
 		params->VrConfigEnable[4]);
+	fsp_display_upd_value("SerialIoI2cVoltage[0]", 1,
+		original->SerialIoI2cVoltage[0],
+		params->SerialIoI2cVoltage[0]);
+	fsp_display_upd_value("SerialIoI2cVoltage[1]", 1,
+		original->SerialIoI2cVoltage[1],
+		params->SerialIoI2cVoltage[1]);
+	fsp_display_upd_value("SerialIoI2cVoltage[2]", 1,
+		original->SerialIoI2cVoltage[2],
+		params->SerialIoI2cVoltage[2]);
+	fsp_display_upd_value("SerialIoI2cVoltage[3]", 1,
+		original->SerialIoI2cVoltage[3],
+		params->SerialIoI2cVoltage[3]);
+	fsp_display_upd_value("SerialIoI2cVoltage[4]", 1,
+		original->SerialIoI2cVoltage[4],
+		params->SerialIoI2cVoltage[4]);
+	fsp_display_upd_value("SerialIoI2cVoltage[5]", 1,
+		original->SerialIoI2cVoltage[5],
+		params->SerialIoI2cVoltage[5]);
 }
 
 static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index f18c9d3113..a46222d371 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -177,6 +177,9 @@ struct soc_intel_skylake_config {
 	 */
 	u8 SerialIoDevMode[PchSerialIoIndexMax];
 
+	/* I2C voltage select. Value: 0: 3.3V , 1: 1.8V.*/
+	u8 SerialIoI2cVoltage[6];
+
 	/* Camera */
 	u8 Cio2Enable;
 
@@ -309,6 +312,7 @@ struct soc_intel_skylake_config {
 	 */
 	u8 SerialIrqConfigStartFramePulse;
 	u8 FspSkipMpInit;
+
 	/* VrConfig Settings for 5 domains
 	 * 0 = System Agent, 1 = IA Core, 2 = Ring,
 	 * 3 = GT unsliced,  4 = GT sliced