siemens/nc_fpga: Set FW_DONE bit before jumping to payload

Once coreboot is ready and payload has been loaded a bit inside the NC
FPGA needs to be set to notify this event. As there are NC FPGAs with
different PCI device IDs save the BAR0 address in a global variable once
the driver evaluates this address. It can then be used to access the
register from the boot state machine callback without the need of searching
for all possible PCI devices again.

As this driver is only used at ramstage there is no need of using
CAR_GLOBAL for the global variable. Use a Kconfig switch to make this
feature selectable from mainboard as not every mainboard may have a FPGA
with that capability.

Change-Id: I9cd09e7051edde30d144a7e020b84bb549e9e8b9
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/22138
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Werner Zeh 2017-10-19 07:21:54 +02:00
parent 0d29a30093
commit f1f67c3b75
3 changed files with 28 additions and 0 deletions

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@ -1,3 +1,7 @@
config DRIVER_SIEMENS_NC_FPGA config DRIVER_SIEMENS_NC_FPGA
bool bool
default n default n
config NC_FPGA_NOTIFY_CB_READY
bool
default n

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@ -22,8 +22,11 @@
#include <string.h> #include <string.h>
#include <delay.h> #include <delay.h>
#include <hwilib.h> #include <hwilib.h>
#include <bootstate.h>
#include "nc_fpga.h" #include "nc_fpga.h"
static void *nc_fpga_bar0;
#define FPGA_SET_PARAM(src, dst) \ #define FPGA_SET_PARAM(src, dst) \
{ \ { \
uint32_t var; \ uint32_t var; \
@ -111,6 +114,9 @@ static void nc_fpga_init(struct device *dev)
/* Ensure this is really a NC FPGA by checking magic register. */ /* Ensure this is really a NC FPGA by checking magic register. */
if (read32(bar0_ptr + NC_MAGIC_OFFSET) != NC_FPGA_MAGIC) if (read32(bar0_ptr + NC_MAGIC_OFFSET) != NC_FPGA_MAGIC)
return; return;
/* Save BAR0 address so that it can be used on all NC_FPGA devices to
set the FW_DONE bit before jumping to payload. */
nc_fpga_bar0 = bar0_ptr;
/* Open hwinfo block. */ /* Open hwinfo block. */
if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS)
return; return;
@ -134,6 +140,22 @@ static void nc_fpga_init(struct device *dev)
} }
} }
#if IS_ENABLED(CONFIG_NC_FPGA_NOTIFY_CB_READY)
/* Set FW_DONE bit in FPGA before jumping to payload. */
static void set_fw_done(void *unused)
{
uint32_t reg;
if (nc_fpga_bar0) {
reg = read32(nc_fpga_bar0 + NC_DIAG_CTRL_OFFSET);
reg |= NC_DIAG_FW_DONE;
write32(nc_fpga_bar0 + NC_DIAG_CTRL_OFFSET, reg);
}
}
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, set_fw_done, NULL);
#endif
static struct device_operations nc_fpga_ops = { static struct device_operations nc_fpga_ops = {
.read_resources = pci_dev_read_resources, .read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = pci_dev_set_resources,

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@ -26,6 +26,8 @@
#define NC_CAP1_FAN_CTRL 0x080 #define NC_CAP1_FAN_CTRL 0x080
#define NC_CAP1_TEMP_MON 0x100 #define NC_CAP1_TEMP_MON 0x100
#define NC_DSAVE_OFFSET 0x58 #define NC_DSAVE_OFFSET 0x58
#define NC_DIAG_CTRL_OFFSET 0x60
#define NC_DIAG_FW_DONE 0x10000
#define NC_BL_BRIGHTNESS_OFFSET 0x88 #define NC_BL_BRIGHTNESS_OFFSET 0x88
#define NC_BL_PWM_OFFSET 0x8C #define NC_BL_PWM_OFFSET 0x8C
#define NC_FANMON_CTRL_OFFSET 0x400 #define NC_FANMON_CTRL_OFFSET 0x400