intel/stm: Drop now unneeded `num_cpus` param

Suggested by Nico Huber in CB:38766

Change-Id: Ib8a340f17a12951bc6bc67e3093046575e7b0e46
Signed-off-by: Eugene D Myers <cedarhouse@comcast.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40438
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Eugene D Myers 2020-04-15 19:11:52 -04:00 committed by Patrick Georgi
parent 076605bc92
commit f213f17992
3 changed files with 4 additions and 4 deletions

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@ -741,7 +741,7 @@ static void asmlinkage smm_do_relocation(void *arg)
mseg = mp_state.perm_smbase + mseg = mp_state.perm_smbase +
(mp_state.perm_smsize - CONFIG_MSEG_SIZE); (mp_state.perm_smsize - CONFIG_MSEG_SIZE);
stm_setup(mseg, p->cpu, runtime->num_cpus, stm_setup(mseg, p->cpu,
perm_smbase, perm_smbase,
mp_state.perm_smbase, mp_state.perm_smbase,
runtime->start32_offset); runtime->start32_offset);

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@ -28,7 +28,7 @@
int load_stm_image(uintptr_t mseg); int load_stm_image(uintptr_t mseg);
void stm_setup( void stm_setup(
uintptr_t mseg, int cpu, int num_cpus, uintptr_t smbase, uintptr_t mseg, int cpu, uintptr_t smbase,
uintptr_t smbase_base, uint32_t offset32); uintptr_t smbase_base, uint32_t offset32);
/* /*

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@ -154,7 +154,7 @@ extern uint8_t *stm_resource_heap;
static int stm_load_status = 0; static int stm_load_status = 0;
void stm_setup(uintptr_t mseg, int cpu, int num_cpus, uintptr_t smbase, void stm_setup(uintptr_t mseg, int cpu, uintptr_t smbase,
uintptr_t base_smbase, uint32_t offset32) uintptr_t base_smbase, uint32_t offset32)
{ {
msr_t InitMseg; msr_t InitMseg;
@ -163,7 +163,7 @@ void stm_setup(uintptr_t mseg, int cpu, int num_cpus, uintptr_t smbase,
uintptr_t addr_calc; // used to calculate the stm resource heap area uintptr_t addr_calc; // used to calculate the stm resource heap area
printk(BIOS_DEBUG, "STM: set up for cpu %d/%d\n", cpu, num_cpus); printk(BIOS_DEBUG, "STM: set up for cpu %d\n", cpu);
vmx_basic = rdmsr(IA32_VMX_BASIC_MSR); vmx_basic = rdmsr(IA32_VMX_BASIC_MSR);