Major cleanup of i386 tables.c:
* fix copyright messages * remove all HAVE_HIGH_TABLES and HAVE_LOW_TABLES preprocessor hackery and instead use high_tables_base to find out if high tables should be used. The code path with high tables disabled and high tables not available for another reason should be the same. * put MP-table into Fseg instead of 0x10. This allows us to drop an huge and ugly portion of code. And it will make some ugly Linux warnings go away. * use ALIGN macro instead of hand crafted aligning. * renumber post codes in this piece of code (don't jump ahead and back anymore) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -1,7 +1,8 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) .... others
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* Copyright (C) 2003 Eric Biederman
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* Copyright (C) 2005 Steve Magnani
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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@ -42,8 +43,6 @@ struct gdtarg {
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} __attribute__((packed));
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// Copy GDT to new location and reload it
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// 2003-07 by SONE Takeshi
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// Ported from Etherboot to coreboot 2005-08 by Steve Magnani
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void move_gdt(unsigned long newgdt)
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{
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uint16_t num_gdt_bytes = &gdt_end - &gdt;
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@ -57,24 +56,22 @@ void move_gdt(unsigned long newgdt)
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printk_debug("ok\n");
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}
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#if HAVE_HIGH_TABLES == 1
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uint64_t high_tables_base = 0;
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uint64_t high_tables_size;
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#endif
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struct lb_memory *write_tables(void)
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{
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unsigned long low_table_start, low_table_end;
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unsigned long rom_table_start, rom_table_end;
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#if HAVE_MP_TABLE == 1 && HAVE_LOW_TABLES == 1
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#if HAVE_MP_TABLE == 1
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unsigned long new_low_table_end;
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#endif
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#if HAVE_HIGH_TABLES == 1
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/* Even if high tables are configured, all tables are copied both to the
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* low and the high area, so payloads and OSes don't need to know about
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* the high tables.
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/* Even if high tables are configured, some tables are copied both to
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* the low and the high area, so payloads and OSes don't need to know
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* about the high tables.
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*/
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unsigned long high_rsdp;
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unsigned long high_table_start=0, high_table_end=0;
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if (high_tables_base) {
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@ -82,118 +79,78 @@ struct lb_memory *write_tables(void)
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high_table_start = high_tables_base;
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high_table_end = high_tables_base;
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} else {
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printk_debug("High Tables Base is not set.\n");
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printk_err("ERROR: High Tables Base is not set.\n");
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}
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#endif
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rom_table_start = 0xf0000;
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rom_table_end = 0xf0000;
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/* Start low addr at 16 bytes instead of 0 because of a buglet
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* in the generic linux unzip code, as it tests for the a20 line.
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/* Start low addr at 0x500, so we don't run into conflicts with the BDA
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* in case our data structures grow beyound 0x400. Only multiboot, GDT
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* and the coreboot table use low_tables.
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*/
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low_table_start = 0;
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low_table_end = 16;
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low_table_end = 0x500;
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post_code(0x99);
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/* This table must be between 0x0f0000 and 0x100000 */
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rom_table_end = write_pirq_routing_table(rom_table_end);
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rom_table_end = ALIGN(rom_table_end, 1024);
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/* And add a high table version for those payloads that
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* want to live in the F segment
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*/
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if (high_tables_base) {
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high_table_end = write_pirq_routing_table(high_table_end);
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high_table_end = ALIGN(high_table_end, 1024);
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}
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post_code(0x9a);
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#if HAVE_LOW_TABLES == 1
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/* This table must be betweeen 0xf0000 & 0x100000 */
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rom_table_end = write_pirq_routing_table(rom_table_end);
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rom_table_end = (rom_table_end + 1023) & ~1023;
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#endif
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#if HAVE_HIGH_TABLES == 1
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if (high_tables_base) {
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high_table_end = write_pirq_routing_table(high_table_end);
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high_table_end = (high_table_end + 1023) & ~1023;
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}
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#endif
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/* Write ACPI tables */
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/* write them in the rom area because DSDT can be large (8K on epia-m) which
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* pushes coreboot table out of first 4K if set up in low table area
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*/
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/* Write ACPI tables to F segment and high tables area */
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#if HAVE_ACPI_TABLES == 1
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#if HAVE_HIGH_TABLES == 1
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#if HAVE_LOW_TABLES == 1
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unsigned long high_rsdp=ALIGN(high_table_end, 16);
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#endif
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if (high_tables_base) {
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unsigned long rsdt_location;
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high_rsdp = ALIGN(high_table_end, 16);
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high_table_end = write_acpi_tables(high_table_end);
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high_table_end = (high_table_end+1023) & ~1023;
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high_table_end = ALIGN(high_table_end, 1024);
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rsdt_location = (unsigned long)(((acpi_rsdp_t*)high_rsdp)->rsdt_address);
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printk_debug("high mem RSDP at %x, RSDT at %x\n", high_rsdp, rsdt_location);
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acpi_write_rsdp((acpi_rsdp_t *)rom_table_end, (acpi_rsdt_t *)rsdt_location);
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rom_table_end = ALIGN(ALIGN(rom_table_end, 16) + sizeof(acpi_rsdp_t), 16);
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} else {
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rom_table_end = write_acpi_tables(rom_table_end);
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rom_table_end = ALIGN(rom_table_end, 1024);
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}
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#if HAVE_LOW_TABLES == 1
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unsigned long rsdt_location=(unsigned long*)(((acpi_rsdp_t*)high_rsdp)->rsdt_address);
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acpi_write_rsdp(rom_table_end, rsdt_location);
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rom_table_end = ALIGN(ALIGN(rom_table_end, 16) + sizeof(acpi_rsdp_t), 16);
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#endif
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#else
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#if HAVE_LOW_TABLES == 1
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rom_table_end = write_acpi_tables(rom_table_end);
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rom_table_end = (rom_table_end+1023) & ~1023;
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#endif
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#endif
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#endif
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/* copy the smp block to address 0 */
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post_code(0x96);
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post_code(0x9b);
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#if HAVE_MP_TABLE == 1
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/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
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#if HAVE_LOW_TABLES == 1
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new_low_table_end = write_smp_table(low_table_end); // low_table_end is 0x10 at this point
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/* Don't write anything in the traditional x86 BIOS data segment,
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* for example the linux kernel smp need to use 0x467 to pass reset vector
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* or use 0x40e/0x413 for EBDA finding...
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*/
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if(new_low_table_end>0x400){
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unsigned mptable_size;
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unsigned mpc_start;
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low_table_end += SMP_FLOATING_TABLE_LEN; /* keep the mpf in 1k low, so kernel can find it */
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mptable_size = new_low_table_end - low_table_end;
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/* We can not put mptable low, we need to copy them to somewhere else*/
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if((rom_table_end+mptable_size)<0x100000) {
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/* We can copy mptable on rom_table */
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mpc_start = rom_table_end;
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rom_table_end += mptable_size;
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rom_table_end = (rom_table_end+1023) & ~1023;
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} else {
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/* We can need to put mptable before rom_table */
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mpc_start = rom_table_start - mptable_size;
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mpc_start &= ~1023;
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rom_table_start = mpc_start;
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}
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printk_debug("move mptable from 0x%0lx to 0x%0x, size 0x%0x\n", low_table_end, mpc_start, mptable_size);
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memcpy((unsigned char *)mpc_start, (unsigned char *)low_table_end, mptable_size);
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smp_write_floating_table_physaddr(low_table_end - SMP_FLOATING_TABLE_LEN, mpc_start);
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memset((unsigned char *)low_table_end, '\0', mptable_size);
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}
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#endif /* HAVE_LOW_TABLES */
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rom_table_end = write_smp_table(rom_table_end);
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rom_table_end = ALIGN(rom_table_end, 1024);
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#if HAVE_HIGH_TABLES == 1
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/* ... and a copy in the high tables */
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if (high_tables_base) {
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high_table_end = write_smp_table(high_table_end);
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high_table_end = (high_table_end+1023) & ~1023;
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high_table_end = ALIGN(high_table_end, 1024);
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}
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#endif
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#endif /* HAVE_MP_TABLE */
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if (low_table_end < 0x500) {
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low_table_end = 0x500;
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}
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post_code(0x9c);
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// Relocate the GDT to reserved memory, so it won't get clobbered
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#if HAVE_HIGH_TABLES == 1
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if (high_tables_base) {
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move_gdt(high_table_end);
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high_table_end += &gdt_end - &gdt;
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high_table_end = (high_table_end+1023) & ~1023;
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high_table_end = ALIGN(high_table_end, 1024);
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} else {
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#endif
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move_gdt(low_table_end);
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low_table_end += &gdt_end - &gdt;
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#if HAVE_HIGH_TABLES == 1
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}
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#endif
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post_code(0x9d);
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#if CONFIG_MULTIBOOT
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/* The Multiboot information structure */
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rom_table_start, rom_table_end);
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#endif
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#if HAVE_HIGH_TABLES == 1
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post_code(0x9e);
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if (high_tables_base) {
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/* Also put a forwarder entry into 0-4K */
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write_coreboot_table(low_table_start, low_table_end,
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high_table_start, high_table_end);
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} else {
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printk_err("ERROR: No high_tables_base.\n");
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/* The coreboot table must be in 0-4K or 960K-1M */
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write_coreboot_table(low_table_start, low_table_end,
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rom_table_start, rom_table_end);
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}
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#else
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/* The coreboot table must be in 0-4K or 960K-1M */
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write_coreboot_table(low_table_start, low_table_end,
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rom_table_start, rom_table_end);
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#endif
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post_code(0x9f);
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return get_lb_mem();
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}
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