GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/common: Remove buildtime error for unknown cpu 

This is not critical functionality and doesn't need a build-time error.
Having it as a build time error causes a chicken & egg issue where
the chipset needs to be added before it can be added to this file, but
the header file fails the build because the chipset is unknown.

It's not practical to exclude these files from the new platform builds
because the PSP functionality is thoroughly embedded into the coreboot
structure.

Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: Ib02bbe1f9ffb343e1ff7c2bfdc45e7edffe7aaed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Martin Roth 2022-10-08 15:23:59 -06:00
parent 1a3de8e5bc
commit f225d761ba
2 changed files with 7 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/soc/amd/common/block/include/amdblocks/psp_efs.h
View File

@ -19,11 +19,8 @@
#elif CONFIG(SOC_AMD_CEZANNE) | CONFIG(SOC_AMD_MENDOCINO) #elif CONFIG(SOC_AMD_CEZANNE) | CONFIG(SOC_AMD_MENDOCINO)
#define SPI_MODE_FIELD spi_readmode_f17_mod_30_3f #define SPI_MODE_FIELD spi_readmode_f17_mod_30_3f
#define SPI_SPEED_FIELD spi_fastspeed_f17_mod_30_3f #define SPI_SPEED_FIELD spi_fastspeed_f17_mod_30_3f
#else
#error <Error: Unknown Processor>
#endif #endif
struct second_gen_efs { /* todo: expand for Server products */ struct second_gen_efs { /* todo: expand for Server products */
uint32_t gen:1; /* Client products only use bit 0 */ uint32_t gen:1; /* Client products only use bit 0 */
uint32_t reserved:31; uint32_t reserved:31;

7
src/soc/amd/common/block/psp/psp_efs.c
View File

@ -2,6 +2,7 @@
#include <amdblocks/psp_efs.h> #include <amdblocks/psp_efs.h>
#include <arch/mmio.h> #include <arch/mmio.h>
#include <assert.h>
#include <boot_device.h> #include <boot_device.h>
#include <commonlib/region.h> #include <commonlib/region.h>
#include <types.h> #include <types.h>
@ -24,7 +25,13 @@ bool read_efs_spi_settings(uint8_t *mode, uint8_t *speed)
if (!efs_is_valid()) if (!efs_is_valid())
return false; return false;
#ifndef SPI_MODE_FIELD
printk(BIOS_ERR, "Unknown cpu in psp_efs.h\n");
printk(BIOS_ERR, "SPI speed/mode not set.\n");
return false;
#else
*mode = efs->SPI_MODE_FIELD; *mode = efs->SPI_MODE_FIELD;
*speed = efs->SPI_SPEED_FIELD; *speed = efs->SPI_SPEED_FIELD;
return true; return true;
#endif
} }