GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brya: set GPP_D0 to GPO 

Based on the schematic carbine_adl-p_dvt_20211104.pdf, the GPP_D0 is
directly connected to FP module, Set GPP_D0 to GPO, DUT can flash FP
firmware successfully.

BUG=b:222188263, b:223906569
TEST=USE="project_gimble emerge-brya coreboot" and run the Fingerprint
Firmware Test.

Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I164ffff6bd3b4058d6e28247eb7c3ed46d3891b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62739
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Mark Hsieh 2022-03-10 22:03:52 +08:00 committed by Subrata Banik
parent 42fcb2a8f4
commit f25e42c4f4
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/brya/variants/baseboard/brya/gpio.c
View File

@ -118,7 +118,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_APIC(GPP_C7, NONE, PLTRST, LEVEL, NONE), PAD_CFG_GPI_APIC(GPP_C7, NONE, PLTRST, LEVEL, NONE),
/* D0 : ISH_GP0 ==> PCH_FP_BOOT0 */ /* D0 : ISH_GP0 ==> PCH_FP_BOOT0 */
PAD_NC_LOCK(GPP_D0, NONE, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_D0, 0, LOCK_CONFIG),
/* D1 : ISH_GP1 ==> FP_RST_ODL */ /* D1 : ISH_GP1 ==> FP_RST_ODL */
PAD_CFG_GPO_LOCK(GPP_D1, 1, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_D1, 1, LOCK_CONFIG),
/* D2 : ISH_GP2 ==> EN_FP_PWR */ /* D2 : ISH_GP2 ==> EN_FP_PWR */