From f296ce91b90ba845b1ff5ca35e98e52e884694cf Mon Sep 17 00:00:00 2001 From: Teo Boon Tiong Date: Tue, 14 Feb 2017 22:16:58 +0800 Subject: [PATCH] soc/intel/skylake: Expand USB OC pins definition to support PCH-H Currently the USB OC pins definition only being defined up to OC3. For PCH-H, OC4 and OC5 are needed, so add both into OC pin enum. Changes is being verified and booted to Yocto with Saddle Brook. Change-Id: Idaed6fa7dcddb9c688966e8bc59f656aec2b26eb Signed-off-by: Teo Boon Tiong Reviewed-on: https://review.coreboot.org/18364 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/include/soc/usb.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/soc/intel/skylake/include/soc/usb.h b/src/soc/intel/skylake/include/soc/usb.h index 77a94a8765..d4f7cc5683 100644 --- a/src/soc/intel/skylake/include/soc/usb.h +++ b/src/soc/intel/skylake/include/soc/usb.h @@ -51,6 +51,8 @@ enum { OC1, OC2, OC3, + OC4, + OC5, OC_SKIP = 8, /* Skip OC programming */ };