mb/google/dedede: Modify flash layout to add ME_RW_A/B regions

Existing implementation adds the CSE RW update binary to FW_MAIN_A/B
regions and this has significant impact on boot time due to the
increase in the size of these regions leading to higher loading
and hashing time.

This patch modifies flash layout to add new ME_RW_A/B fmap regions
in the RW_SECTION_A/B.

BUG=b:169077783
TEST= Built for dedede. Verified that CSE RW binary is added to the
CSE_RW_A/B fmap region.

Change-Id: I23a3e22a569488b39beb4d12f5b6309c7c742992
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47439
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
V Sowmya 2020-11-11 08:15:09 +05:30 committed by Furquan Shaikh
parent 338b83c7b8
commit f2e8a7ae6b
2 changed files with 12 additions and 8 deletions

View File

@ -7,13 +7,15 @@ FLASH@0xff000000 0x1000000 {
RW_LEGACY(CBFS)@0x0 0x100000
RW_SECTION_A@0x100000 0x3a4800 {
VBLOCK_A@0x0 0x2000
FW_MAIN_A(CBFS)@0x2000 0x3a27c0
RW_FWID_A@0x3a47c0 0x40
FW_MAIN_A(CBFS)@0x2000 0x2127c0
RW_FWID_A@0x2147c0 0x40
ME_RW_A(CBFS)@0x214800 0x190000
}
RW_SECTION_B@0x4a4800 0x3a4800 {
VBLOCK_B@0x0 0x2000
FW_MAIN_B(CBFS)@0x2000 0x3a27c0
RW_FWID_B@0x3a47c0 0x40
FW_MAIN_B(CBFS)@0x2000 0x2127c0
RW_FWID_B@0x2147c0 0x40
ME_RW_B(CBFS)@0x214800 0x190000
}
RW_MISC@0x849000 0x36000 {
UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x30000 {

View File

@ -10,13 +10,15 @@ FLASH@0xfe000000 0x2000000 {
RW_LEGACY(CBFS)@0x0 0xf00000
RW_SECTION_A@0xf00000 0x3e0000 {
VBLOCK_A@0x0 0x10000
FW_MAIN_A(CBFS)@0x10000 0x3cffc0
RW_FWID_A@0x3dffc0 0x40
FW_MAIN_A(CBFS)@0x10000 0x23ffc0
RW_FWID_A@0x24ffc0 0x40
ME_RW_A(CBFS)@0x250000 0x190000
}
RW_SECTION_B@0x12e0000 0x3e0000 {
VBLOCK_B@0x0 0x10000
FW_MAIN_B(CBFS)@0x10000 0x3cffc0
RW_FWID_B@0x3dffc0 0x40
FW_MAIN_B(CBFS)@0x10000 0x23ffc0
RW_FWID_B@0x24ffc0 0x40
ME_RW_B(CBFS)@0x250000 0x190000
}
RW_MISC@0x16c0000 0x40000 {
UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x30000 {