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AMD binaryPI: Split romstage ram stack 

Change-Id: Ibbff1fdb1af247550815532ef12f078229f12321
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15467
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-06-27 15:25:14 +03:00
parent bd274e1363
commit f32d5b8b66
3 changed files with 11 additions and 11 deletions
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10
src/cpu/amd/pi/heapmanager.c
View File

@ -25,13 +25,9 @@ UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader)
{
UINT32 heap = BIOS_HEAP_START_ADDRESS;
#if CONFIG_HAVE_ACPI_RESUME
/* Both romstage and ramstage has this S3 detect. */
if (acpi_get_sleep_type() == 3)
heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH) +
(CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE);
/* himem_heap_base + high_stack_size */
#endif
if (acpi_is_wakeup_s3())
heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH);
return heap;
}

9
src/cpu/amd/pi/s3_resume.c
View File

@ -137,11 +137,12 @@ void restore_mtrr(void)
#ifdef __PRE_RAM__
static void move_stack_high_mem(void)
{
void *high_stack;
void *high_stack = cbmem_find(CBMEM_ID_ROMSTAGE_RAM_STACK);
if (high_stack == NULL)
halt();
high_stack = cbmem_find(CBMEM_ID_RESUME_SCRATCH);
memcpy(high_stack, (void *)BSP_STACK_BASE_ADDR,
(CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE));
/* TODO: Make the switch with empty stack instead. */
memcpy(high_stack, (void *)BSP_STACK_BASE_ADDR, HIGH_ROMSTAGE_STACK_SIZE);
#ifdef __x86_64__
__asm__

3
src/cpu/amd/pi/s3_resume.h
View File

@ -31,4 +31,7 @@ void OemAgesaSaveMtrr (void);
void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len);
/* This covers node 0 only. */
#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR)
#endif