diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
index 98e979e2eb..07818540b6 100644
--- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
@@ -92,15 +92,15 @@ Device (LPCB)
 		{
 			If (HPTE) {
 				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
-				If (Lequal(HPAS, 1)) {
+				If (HPAS == 1) {
 					HPT0 = HPET_BASE_ADDRESS + 0x1000
 				}
 
-				If (Lequal(HPAS, 2)) {
+				If (HPAS == 2) {
 					HPT0 = HPET_BASE_ADDRESS + 0x2000
 				}
 
-				If (Lequal(HPAS, 3)) {
+				If (HPAS == 3) {
 					HPT0 = HPET_BASE_ADDRESS + 0x3000
 				}
 			}
diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl
index 5a80ab0b3e..51c3c48d86 100644
--- a/src/southbridge/intel/bd82x6x/acpi/pch.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl
@@ -247,13 +247,13 @@ Method (_OSC, 4)
 	 * Arg3 - A Buffer containing a list of DWORD capabilities
 	 */
 	/* Check for XHCI */
-	If (LEqual (Arg0, ToUUID("7c9512a9-1705-4cb4-af7d-506a2423ab71")))
+	If (Arg0 == ToUUID("7c9512a9-1705-4cb4-af7d-506a2423ab71"))
 	{
 		Return (^XHC.POSC(Arg2, Arg3))
 	}
 
 	/* Check for PCIe */
-	If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
+	If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
 	{
 		/* Let OS control everything */
 		Return (Arg3)