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soc/intel/common/cse: Drop dependency on CHROMEOS for SOC_INTEL_CSE_LITE_SKU 

The CSE lite SKU has 2 CSE firmware boot partitions vs 3 for the "normal"
SKU; this has nothing to do with building for ChromeOS or not, and by
having this dependency, boards with select the CSE lite SKU are unable to
build with CONFIG_CHROMEOS unset due to Kconfig dependency issues.

Test: build google/wyvern with CONFIG_CHROMEOS not set.

Change-Id: I6959f35e1285b2fab7ea1f83a5ccfcb065c12397
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2021-01-03 11:55:27 -06:00 committed by Patrick Georgi
parent 8a1e2e1765
commit f3419b29b7
2 changed files with 1 additions and 2 deletions
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2
src/mainboard/google/hatch/Kconfig
View File

@ -11,7 +11,7 @@ config BOARD_GOOGLE_BASEBOARD_PUFF
select RT8168_SET_LED_MODE select RT8168_SET_LED_MODE
select ROMSTAGE_SPD_SMBUS select ROMSTAGE_SPD_SMBUS
select SPD_READ_BY_WORD select SPD_READ_BY_WORD
select SOC_INTEL_CSE_LITE_SKU if CHROMEOS select SOC_INTEL_CSE_LITE_SKU
select DRIVERS_INTEL_DPTF select DRIVERS_INTEL_DPTF
select DPTF_USE_EISA_HID select DPTF_USE_EISA_HID

1
src/soc/intel/common/block/cse/Kconfig
View File

@ -16,7 +16,6 @@ config SOC_INTEL_COMMON_BLOCK_HECI_DISABLE_IN_SMM
config SOC_INTEL_CSE_LITE_SKU config SOC_INTEL_CSE_LITE_SKU
bool bool
default n default n
depends on CHROMEOS
select ME_REGION_ALLOW_CPU_READ_ACCESS select ME_REGION_ALLOW_CPU_READ_ACCESS
help help
Enables CSE Lite SKU Enables CSE Lite SKU