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coreboot-kgpe-d16
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Get rid of all but one (I/O mapped) UART init functions. 

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2011-04-22 02:17:26 +00:00 committed by Stefan Reinauer
parent 6aca1e8b26
commit f349d55beb
2 changed files with 15 additions and 24 deletions
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15
src/console/uart8250_console.c
View File

@ -23,20 +23,7 @@
static void ttyS0_init(void)
{
static const unsigned char div[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
int b_index = 0;
/* TODO the divisor calculation is hard coded to standard UARTs. Some
* UARTs won't work with these values. This should be a property of the
* UART used, worst case a Kconfig variable. For now live with hard
* codes as the only devices that might be different are the iWave
* iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped)
*/
unsigned int divisor = 115200 / CONFIG_TTYS0_BAUD;
if (get_option(&b_index, "baud_rate") == 0) {
divisor = div[b_index];
}
uart8250_init(CONFIG_TTYS0_BASE, divisor);
uart_init();
}
static void ttyS0_tx_byte(unsigned char data)

24
src/lib/uart8250.c
View File

@ -85,7 +85,6 @@ void uart8250_init(unsigned base_port, unsigned divisor)
outb(CONFIG_TTYS0_LCS, base_port + UART_LCR);
}
#if defined(__PRE_RAM__) || defined(__SMM__)
void uart_init(void)
{
/* TODO the divisor calculation is hard coded to standard UARTs. Some
@ -94,16 +93,21 @@ void uart_init(void)
* codes as the only devices that might be different are the iWave
* iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped)
*/
#if CONFIG_USE_OPTION_TABLE && !defined(__SMM__)
static const unsigned char divisor[] = { 1, 2, 3, 6, 12, 24, 48, 96 };
unsigned ttys0_div, ttys0_index;
ttys0_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
ttys0_index &= 7;
ttys0_div = divisor[ttys0_index];
unsigned int div = (115200 / CONFIG_TTYS0_BAUD);
uart8250_init(CONFIG_TTYS0_BASE, ttys0_div);
#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
unsigned b_index = 0;
#if defined(__PRE_RAM__)
b_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
b_index &= 7;
div = divisor[ttys0_index];
#else
uart8250_init(CONFIG_TTYS0_BASE, (115200 / CONFIG_TTYS0_BAUD));
if (get_option(&b_index, "baud_rate") == 0) {
div = divisor[b_index];
}
#endif
#endif
uart8250_init(CONFIG_TTYS0_BASE, div);
}
#endif