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Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges. 

Both are tested and appear to be working, however I'm not 100% clear
on if the NM10 has any other PCI IDs.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Corey Osgood 2010-08-17 08:33:44 +00:00 committed by Stefan Reinauer
parent e7b7ae23e6
commit f366ce05ef
5 changed files with 10 additions and 0 deletions
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2
util/inteltool/gpio.c
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@ -171,6 +171,7 @@ int print_gpios(struct pci_dev *sb)
gpio_registers = ich9_gpio_registers; gpio_registers = ich9_gpio_registers;
size = ARRAY_SIZE(ich9_gpio_registers); size = ARRAY_SIZE(ich9_gpio_registers);
break; break;
case PCI_DEVICE_ID_INTEL_ICH8:
case PCI_DEVICE_ID_INTEL_ICH8M: case PCI_DEVICE_ID_INTEL_ICH8M:
gpiobase = pci_read_word(sb, 0x48) & 0xfffc; gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
gpio_registers = ich8_gpio_registers; gpio_registers = ich8_gpio_registers;
@ -180,6 +181,7 @@ int print_gpios(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH7M: case PCI_DEVICE_ID_INTEL_ICH7M:
case PCI_DEVICE_ID_INTEL_ICH7DH: case PCI_DEVICE_ID_INTEL_ICH7DH:
case PCI_DEVICE_ID_INTEL_ICH7MDH: case PCI_DEVICE_ID_INTEL_ICH7MDH:
case PCI_DEVICE_ID_INTEL_NM10:
gpiobase = pci_read_word(sb, 0x48) & 0xfffc; gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
gpio_registers = ich7_gpio_registers; gpio_registers = ich7_gpio_registers;
size = ARRAY_SIZE(ich7_gpio_registers); size = ARRAY_SIZE(ich7_gpio_registers);

2
util/inteltool/inteltool.c
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@ -61,6 +61,8 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9M, "ICH9M" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9M, "ICH9M" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9ME, "ICH9M-E" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9ME, "ICH9M-E" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8, "ICH8" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10, "NM10" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },

2
util/inteltool/inteltool.h
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@ -43,6 +43,8 @@
#define PCI_DEVICE_ID_INTEL_ICH7 0x27b8 #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8
#define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9 #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9
#define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd
#define PCI_DEVICE_ID_INTEL_NM10 0x27bc
#define PCI_DEVICE_ID_INTEL_ICH8 0x2810
#define PCI_DEVICE_ID_INTEL_ICH8M 0x2815 #define PCI_DEVICE_ID_INTEL_ICH8M 0x2815
#define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912 #define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912
#define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914 #define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914

2
util/inteltool/powermgt.c
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@ -477,6 +477,7 @@ int print_pmbase(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH7M: case PCI_DEVICE_ID_INTEL_ICH7M:
case PCI_DEVICE_ID_INTEL_ICH7DH: case PCI_DEVICE_ID_INTEL_ICH7DH:
case PCI_DEVICE_ID_INTEL_ICH7MDH: case PCI_DEVICE_ID_INTEL_ICH7MDH:
case PCI_DEVICE_ID_INTEL_NM10:
pmbase = pci_read_word(sb, 0x40) & 0xfffc; pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich7_pm_registers; pm_registers = ich7_pm_registers;
size = ARRAY_SIZE(ich7_pm_registers); size = ARRAY_SIZE(ich7_pm_registers);
@ -491,6 +492,7 @@ int print_pmbase(struct pci_dev *sb)
pm_registers = ich9_pm_registers; pm_registers = ich9_pm_registers;
size = ARRAY_SIZE(ich9_pm_registers); size = ARRAY_SIZE(ich9_pm_registers);
break; break;
case PCI_DEVICE_ID_INTEL_ICH8:
case PCI_DEVICE_ID_INTEL_ICH8M: case PCI_DEVICE_ID_INTEL_ICH8M:
pmbase = pci_read_word(sb, 0x40) & 0xfffc; pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich8_pm_registers; pm_registers = ich8_pm_registers;

2
util/inteltool/rootcmplx.c
View File

@ -43,6 +43,8 @@ int print_rcba(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH9M: case PCI_DEVICE_ID_INTEL_ICH9M:
case PCI_DEVICE_ID_INTEL_ICH9ME: case PCI_DEVICE_ID_INTEL_ICH9ME:
case PCI_DEVICE_ID_INTEL_ICH8M: case PCI_DEVICE_ID_INTEL_ICH8M:
case PCI_DEVICE_ID_INTEL_ICH8:
case PCI_DEVICE_ID_INTEL_NM10:
rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe; rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
break; break;
case PCI_DEVICE_ID_INTEL_ICH: case PCI_DEVICE_ID_INTEL_ICH: