soc/intel/alderlake: Add CPU ID 0x906a4

TEST=Build and boot brya

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I4342c7343876eb40c2955f6f4dd99d6346852dc0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57610
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Varshit B Pandya <varshit.b.pandya@intel.com>

src/include/cpu/intel/cpu_ids.h

@@ -54,5 +54,6 @@
 #define CPUID_ALDERLAKE_A0		0x906a0
 #define CPUID_ALDERLAKE_A1		0x906a1
 #define CPUID_ALDERLAKE_A2		0x906a2
+#define CPUID_ALDERLAKE_A3		0x906a4
 
 #endif /* CPU_INTEL_CPU_IDS_H */

src/soc/intel/alderlake/bootblock/report_platform.c

@@ -26,6 +26,7 @@ static struct {
 	{ CPUID_ALDERLAKE_A0, "Alderlake Platform" },
 	{ CPUID_ALDERLAKE_A1, "Alderlake Platform" },
 	{ CPUID_ALDERLAKE_A2, "Alderlake Platform" },
+	{ CPUID_ALDERLAKE_A3, "Alderlake Platform" },
 };
 
 static struct {

src/soc/intel/common/block/cpu/mp_init.c

@@ -71,6 +71,7 @@ static const struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A0 },
 	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A1 },
 	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A2 },
+	{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A3 },
 	{ 0, 0 },
 };