arch/riscv: Don't set FPU state to "dirty"

Quoting from the RISC-V Privileged Architecture manual version 1.10,
chapter 3.1.11:

    The FS and XS fields use the same status encoding as shown in Table
    3.3, with the four possible status values being Off, Initial, Clean,
    and Dirty.

    Status   FS Meaning    XS Meaning
        0    Off           All off
        1    Initial       None dirty of clean, some on
        2    Clean         None dirty, some clean
        3    Dirty         Some dirty

Change-Id: If0225044ed52215ce64ea979d120014e02d4ce37
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/28987
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/arch/riscv/virtual_memory.c

@@ -40,11 +40,6 @@ static int delegate = 0
 
 void mstatus_init(void)
 {
-	uintptr_t ms = 0;
-
-	ms = INSERT_FIELD(ms, MSTATUS_FS, 3);
-	write_csr(mstatus, ms);
-
 	// clear any pending timer interrupts.
 	clear_csr(mip,  MIP_STIP | MIP_SSIP);