GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

sb/amd/{agesa,pi}/hudson: enable support for AMD common ACPIMMIO blocks 

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Idd014f1ba85efff0c98a0c5ab60d775ac93cbc60
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37177
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Michał Żygowski 2019-11-24 13:26:10 +01:00 committed by Patrick Georgi
parent c1abf137ff
commit f3db2aea85
17 changed files with 21 additions and 99 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/pcengines/apu2/mainboard.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <amdblocks/acpimmio.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>

3
src/southbridge/amd/agesa/hudson/Kconfig
View File

@ -27,6 +27,9 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_USBDEBUG_OPTIONS
select HAVE_CF9_RESET
select HAVE_CF9_RESET_PREPARE
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
config BOOTBLOCK_SOUTHBRIDGE_INIT
string

26
src/southbridge/amd/agesa/hudson/hudson.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/mmio.h>
#include <device/device.h>
@ -25,31 +26,6 @@
#include "smbus.h"
#include "smi.h"
/* Offsets from ACPI_MMIO_BASE
* This is defined by AGESA, but we don't include AGESA headers to avoid
* polluting the namespace.
*/
#define PM_MMIO_BASE 0xfed80300
void pm_write8(u8 reg, u8 value)
{
write8((void *)((uintptr_t)PM_MMIO_BASE + reg), value);
}
u8 pm_read8(u8 reg)
{
return read8((void *)((uintptr_t)PM_MMIO_BASE + reg));
}
void pm_write16(u8 reg, u16 value)
{
write16((void *)((uintptr_t)PM_MMIO_BASE + reg), value);
}
u16 pm_read16(u16 reg)
{
return read16((void *)((uintptr_t)PM_MMIO_BASE + reg));
}
#define PM_REG_USB_ENABLE 0xef

5
src/southbridge/amd/agesa/hudson/hudson.h
View File

@ -61,11 +61,6 @@ static inline int hudson_ide_enable(void)
return (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
}
void pm_write8(u8 reg, u8 value);
u8 pm_read8(u8 reg);
void pm_write16(u8 reg, u16 value);
u16 pm_read16(u16 reg);
void hudson_lpc_port80(void);
void hudson_pci_port80(void);
void hudson_clk_output_48Mhz(void);

1
src/southbridge/amd/agesa/hudson/lpc.c
View File

@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>

1
src/southbridge/amd/agesa/hudson/smi.c
View File

@ -18,6 +18,7 @@
* Utilities for SMM setup
*/
#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <cpu/x86/smm.h>

20
src/southbridge/amd/agesa/hudson/smi.h
View File

@ -47,26 +47,6 @@ enum smi_lvl {
SMI_LVL_HIGH = 1,
};
static inline uint32_t smi_read32(uint8_t offset)
{
return read32((void *)((uintptr_t)SMI_BASE + offset));
}
static inline void smi_write32(uint8_t offset, uint32_t value)
{
write32((void *)((uintptr_t)SMI_BASE + offset), value);
}
static inline uint16_t smi_read16(uint8_t offset)
{
return read16((void *)((uintptr_t)SMI_BASE + offset));
}
static inline void smi_write16(uint8_t offset, uint16_t value)
{
write16((void *)((uintptr_t)SMI_BASE + offset), value);
}
void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
void hudson_disable_gevent_smi(uint8_t gevent);
void hudson_enable_acpi_cmd_smi(void);

5
src/southbridge/amd/agesa/hudson/smi_util.c
View File

@ -18,10 +18,11 @@
* SMM utilities used in both SMM and normal mode
*/
#include "smi.h"
#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include "smi.h"
#define HUDSON_SMI_ACPI_COMMAND 75
static void configure_smi(uint8_t smi_num, uint8_t mode)

1
src/southbridge/amd/agesa/hudson/smihandler.c
View File

@ -18,6 +18,7 @@
* SMI handler for Hudson southbridges
*/
#include <amdblocks/acpimmio.h>
#include <arch/io.h>
#include <cpu/x86/smm.h>

3
src/southbridge/amd/pi/hudson/Kconfig
View File

@ -30,6 +30,9 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_USBDEBUG_OPTIONS
select HAVE_CF9_RESET
select HAVE_CF9_RESET_PREPARE
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
config BOOTBLOCK_SOUTHBRIDGE_INIT
string

21
src/southbridge/amd/pi/hudson/hudson.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <arch/io.h>
#include <device/mmio.h>
@ -36,26 +37,6 @@ int acpi_get_sleep_type(void)
return (int)tmp;
}
void pm_write8(u8 reg, u8 value)
{
write8((void *)(PM_MMIO_BASE + reg), value);
}
u8 pm_read8(u8 reg)
{
return read8((void *)(PM_MMIO_BASE + reg));
}
void pm_write16(u8 reg, u16 value)
{
write16((void *)(PM_MMIO_BASE + reg), value);
}
u16 pm_read16(u16 reg)
{
return read16((void *)(PM_MMIO_BASE + reg));
}
void hudson_enable(struct device *dev)
{
printk(BIOS_DEBUG, "hudson_enable()\n");

5
src/southbridge/amd/pi/hudson/hudson.h
View File

@ -169,11 +169,6 @@ static inline int hudson_ide_enable(void)
return (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
}
void pm_write8(u8 reg, u8 value);
u8 pm_read8(u8 reg);
void pm_write16(u8 reg, u16 value);
u16 pm_read16(u16 reg);
void hudson_lpc_port80(void);
void hudson_lpc_decode(void);
void hudson_pci_port80(void);

1
src/southbridge/amd/pi/hudson/lpc.c
View File

@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>

1
src/southbridge/amd/pi/hudson/smi.c
View File

@ -18,6 +18,7 @@
* Utilities for SMM setup
*/
#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <cpu/x86/smm.h>

20
src/southbridge/amd/pi/hudson/smi.h
View File

@ -47,26 +47,6 @@ enum smi_lvl {
SMI_LVL_HIGH = 1,
};
static inline uint32_t smi_read32(uint8_t offset)
{
return read32((void *)(SMI_BASE + offset));
}
static inline void smi_write32(uint8_t offset, uint32_t value)
{
write32((void *)(SMI_BASE + offset), value);
}
static inline uint16_t smi_read16(uint8_t offset)
{
return read16((void *)(SMI_BASE + offset));
}
static inline void smi_write16(uint8_t offset, uint16_t value)
{
write16((void *)(SMI_BASE + offset), value);
}
void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
void hudson_disable_gevent_smi(uint8_t gevent);
void hudson_enable_acpi_cmd_smi(void);

5
src/southbridge/amd/pi/hudson/smi_util.c
View File

@ -18,10 +18,11 @@
* SMM utilities used in both SMM and normal mode
*/
#include "smi.h"
#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include "smi.h"
#define HUDSON_SMI_ACPI_COMMAND 75
static void configure_smi(uint8_t smi_num, uint8_t mode)

1
src/southbridge/amd/pi/hudson/smihandler.c
View File

@ -18,6 +18,7 @@
* SMI handler for Hudson southbridges
*/
#include <amdblocks/acpimmio.h>
#include <arch/io.h>
#include <cpu/x86/smm.h>