GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brya/variants/agah: set tcc_offset to 3 

Set tcc_offset value to 3 in devicetree for Thermal Control Circuit
(TCC) activation feature. This value is suggested by Thermal team.

BUG=b:240600260
TEST=emerge-draco coreboot
     verified by thermal team

Change-Id: I3044643d52f1d6e883beb3ec87a77f32d086f46c
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Tony Huang 2022-07-29 10:10:44 +08:00 committed by Felix Held
parent d307d0d2fb
commit f3e5f9966f
1 changed files with 1 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/google/brya/variants/agah/overridetree.cb
View File

@ -39,6 +39,7 @@ chip soc/intel/alderlake
},
}"
register "tcc_offset" = "3" # TCC of 97
register "sagv" = "SaGv_Disabled"
register "tcss_aux_ori" = "0x10"
register "typec_aux_bias_pads[2]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"