diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index 40676f1b7d..f04c3d7b5a 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -530,10 +530,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	/* USB4/TBT */
 	for (i = 0; i < ARRAY_SIZE(params->ITbtPcieRootPortEn); i++) {
 		dev = pcidev_on_root(SA_DEV_SLOT_TBT, i);
-		if (dev)
-			params->ITbtPcieRootPortEn[i] = dev->enabled;
-		else
-			params->ITbtPcieRootPortEn[i] = 0;
+		params->ITbtPcieRootPortEn[i] = is_dev_enabled(dev);
 	}
 
 	/* PCH FIVR settings override */