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cpu/x86/mtrr: fix fls() and fms() inline assembly 

The x86 bsf and bsr instructions only allow for a memory
or register operand. The 'g' constraint includes immediate
operands which the compiler could choose to emit for the instruction.
However, the assembler will rightfully complain because the
instruction with an immediate operand is illegal. Fix the constraints
to bsf and bsr to only include memory or registers.

Change-Id: Idea7ae7df451eb69dd30208ebad7146ca01f6cba
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/22291
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Aaron Durbin 2017-11-01 15:47:05 -06:00
parent 383ef6eef8
commit f4258dec63
1 changed files with 2 additions and 2 deletions
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4
src/include/cpu/x86/mtrr.h
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@ -97,7 +97,7 @@ static inline unsigned int fms(unsigned int x)
__asm__("bsrl %1,%0\n\t"
"jnz 1f\n\t"
"movl $0,%0\n"
"1:" : "=r" (r) : "g" (x));
"1:" : "=r" (r) : "mr" (x));
return r;
}
@ -109,7 +109,7 @@ static inline unsigned int fls(unsigned int x)
__asm__("bsfl %1,%0\n\t"
"jnz 1f\n\t"
"movl $32,%0\n"
"1:" : "=r" (r) : "g" (x));
"1:" : "=r" (r) : "mr" (x));
return r;
}
#endif /* !defined(__ASSEMBLER__) && !defined(__ROMCC__) */