soc/amd/common/smbus: remove misleading definition
SMBHST_STAT_NOERROR was a redefinition of SMBHST_STAT_INTERRUPT that was used in smbus_wait_until_done. Remove the misleading bit definition that also didn't correspond with the register definitions and replace it with the definition of the actual bit that gets checked. Also add a comment that the code actually checks the IRQ status flag to see if the last command is already completed. Change-Id: I1a58fe0d58d3887dd2e83320e977a57e271685b3 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48219 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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@ -11,7 +11,6 @@
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#define SMBHST_STAT_INTERRUPT (1 << 1)
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#define SMBHST_STAT_INTERRUPT (1 << 1)
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#define SMBHST_STAT_BUSY (1 << 0)
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#define SMBHST_STAT_BUSY (1 << 0)
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#define SMBHST_STAT_CLEAR 0xff
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#define SMBHST_STAT_CLEAR 0xff
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#define SMBHST_STAT_NOERROR (1 << 1) /* TODO: this one looks odd */
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#define SMBHST_STAT_VAL_BITS 0x1f
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#define SMBHST_STAT_VAL_BITS 0x1f
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#define SMBHST_STAT_ERROR_BITS 0x1c
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#define SMBHST_STAT_ERROR_BITS 0x1c
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@ -69,7 +69,8 @@ static int smbus_wait_until_done(uintptr_t mmio)
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val &= SMBHST_STAT_VAL_BITS; /* mask off reserved bits */
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val &= SMBHST_STAT_VAL_BITS; /* mask off reserved bits */
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if (val & SMBHST_STAT_ERROR_BITS)
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if (val & SMBHST_STAT_ERROR_BITS)
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return -5; /* error */
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return -5; /* error */
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if (val == SMBHST_STAT_NOERROR) {
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/* check IRQ status bit to see if the last host command is completed */
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if (val == SMBHST_STAT_INTERRUPT) {
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controller_write8(mmio, SMBHSTSTAT, val); /* clr sts */
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controller_write8(mmio, SMBHSTSTAT, val); /* clr sts */
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return 0;
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return 0;
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}
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}
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