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make clear_1m_ram.c to support gcc 3 and gcc4 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu 2005-12-09 01:58:07 +00:00
parent 653ee54a88
commit f42e1770f9
1 changed files with 59 additions and 48 deletions
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85
src/cpu/amd/car/clear_1m_ram.c
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@ -3,58 +3,69 @@
static inline __attribute__((always_inline)) void clear_1m_ram(void) static inline __attribute__((always_inline)) void clear_1m_ram(void)
{ {
__asm__ volatile ( __asm__ volatile (
/* disable cache */ /* disable cache */
"movl %cr0, %eax\n\t" "movl %%cr0, %%eax\n\t"
"orl $(0x1<<30),%eax\n\t" "orl $(0x1<<30),%%eax\n\t"
"movl %eax, %cr0\n\t" "movl %%eax, %%cr0\n\t"
);
/* enable caching for first 1M using variable mtrr */ /* enable caching for first 1M using variable mtrr */
__asm__ volatile ( "movl $0x200, %%ecx\n\t"
"wrmsr" "xorl %%edx, %%edx\n\t"
: /* No outputs */ "movl $(0 | 1), %%eax\n\t"
: "c" (0x200), "a" (0 | MTRR_TYPE_WRCOMB), "d" (0) // "movl $(0 | MTRR_TYPE_WRCOMB), %%eax\n\t"
); "wrmsr\n\t"
__asm__ volatile ( "movl $0x201, %%ecx\n\t"
"wrmsr" "movl $0x0000000f, %%edx\n\t"
: /* No outputs */ #if CONFIG_USE_INIT
: "c" (0x201), "a" ((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), "d" (0x0000000f) "movl %%esi, %%eax\n\t"
); #else
"movl $((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), %%eax\n\t"
#endif
"wrmsr\n\t"
__asm__ volatile(
/* clear the first 1M */ /* clear the first 1M */
#if CONFIG_USE_INIT
"movl %%edi, %%ecx\n\t"
#else
"movl $((CONFIG_LB_MEM_TOPK<<10)>>2), %%ecx\n\t"
#endif
"xorl %%edi, %%edi\n\t"
"cld\n\t" "cld\n\t"
"xorl %%eax, %%eax\n\t"
"rep stosl\n\t" "rep stosl\n\t"
:
: "a"(0), "D"(0) ,"c" ((CONFIG_LB_MEM_TOPK<<10)>>2)
);
__asm__ volatile (
/* disable cache */ /* disable cache */
"movl %cr0, %eax\n\t" "movl %%cr0, %%eax\n\t"
"orl $(0x1<<30),%eax\n\t" "orl $(0x1<<30),%%eax\n\t"
"movl %eax, %cr0\n\t" "movl %%eax, %%cr0\n\t"
);
/* enable caching for first 1M using variable mtrr */ /* enable caching for first 1M using variable mtrr */
__asm__ volatile ( "movl $0x200, %%ecx\n\t"
"wrmsr" "xorl %%edx, %%edx\n\t"
: /* No outputs */ "movl $(0 | 6), %%eax\n\t"
: "c" (0x200), "a" (0 | MTRR_TYPE_WRBACK), "d" (0) // "movl $(0 | MTRR_TYPE_WRBACK), %%eax\n\t"
); "wrmsr\n\t"
__asm__ volatile ( "movl $0x201, %%ecx\n\t"
"wrmsr" "movl $0x0000000f, %%edx\n\t"
: /* No outputs */ #if CONFIG_USE_INIT
: "c" (0x201), "a" ((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), "d" (0x0000000f) "movl %%esi, %%eax\n\t"
); #else
"movl $((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), %%eax\n\t"
#endif
"wrmsr\n\t"
__asm__ volatile (
/* enable cache */ /* enable cache */
"movl %cr0, %eax\n\t" "movl %%cr0, %%eax\n\t"
"andl $0x9fffffff,%eax\n\t" "andl $0x9fffffff,%%eax\n\t"
"movl %eax, %cr0\n\t" "movl %%eax, %%cr0\n\t"
"invd\n\t" "invd\n\t"
:
:
#if CONFIG_USE_INIT
"S"((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), "D" ((CONFIG_LB_MEM_TOPK<<10)>>2)
#endif
); );
} }